Semiconductor device
A semiconductor device (100, 100′, 100″) and a method for manufacturing a semiconductor device (100, 100′, 100″). The semiconductor device (100, 100′, 100″) includes a substrate (104, 106), a GaN layer (112), and an AlGaN layer (114). The GaN layer (112) is located between the substrate (104, 106) a...
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creator | Donkers, Johannes Josephus Theodorus Marinus Broekman, Hans |
description | A semiconductor device (100, 100′, 100″) and a method for manufacturing a semiconductor device (100, 100′, 100″). The semiconductor device (100, 100′, 100″) includes a substrate (104, 106), a GaN layer (112), and an AlGaN layer (114). The GaN layer (112) is located between the substrate (104, 106) and the AlGaN layer (114). The device further includes at least one contact (130, 132, 134), comprising a central portion (150) and an edge portion (152), and a passivation layer (160) located at least between the edge portion (152) of the contact (130, 132, 134) and the AlGaN layer (114). The edge portion (152) is spaced apart from an upper surface of the passivation layer (160). The edge portion (152) may be spaced apart from the passivation layer (160) by a further layer (170) or by an air gap (172). |
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The semiconductor device (100, 100′, 100″) includes a substrate (104, 106), a GaN layer (112), and an AlGaN layer (114). The GaN layer (112) is located between the substrate (104, 106) and the AlGaN layer (114). The device further includes at least one contact (130, 132, 134), comprising a central portion (150) and an edge portion (152), and a passivation layer (160) located at least between the edge portion (152) of the contact (130, 132, 134) and the AlGaN layer (114). The edge portion (152) is spaced apart from an upper surface of the passivation layer (160). The edge portion (152) may be spaced apart from the passivation layer (160) by a further layer (170) or by an air gap (172).</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221227&DB=EPODOC&CC=US&NR=11538908B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221227&DB=EPODOC&CC=US&NR=11538908B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Donkers, Johannes Josephus Theodorus Marinus</creatorcontrib><creatorcontrib>Broekman, Hans</creatorcontrib><title>Semiconductor device</title><description>A semiconductor device (100, 100′, 100″) and a method for manufacturing a semiconductor device (100, 100′, 100″). The semiconductor device (100, 100′, 100″) includes a substrate (104, 106), a GaN layer (112), and an AlGaN layer (114). The GaN layer (112) is located between the substrate (104, 106) and the AlGaN layer (114). The device further includes at least one contact (130, 132, 134), comprising a central portion (150) and an edge portion (152), and a passivation layer (160) located at least between the edge portion (152) of the contact (130, 132, 134) and the AlGaN layer (114). The edge portion (152) is spaced apart from an upper surface of the passivation layer (160). The edge portion (152) may be spaced apart from the passivation layer (160) by a further layer (170) or by an air gap (172).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGpsYWlgYWTkbGxKgBAGSTISQ</recordid><startdate>20221227</startdate><enddate>20221227</enddate><creator>Donkers, Johannes Josephus Theodorus Marinus</creator><creator>Broekman, Hans</creator><scope>EVB</scope></search><sort><creationdate>20221227</creationdate><title>Semiconductor device</title><author>Donkers, Johannes Josephus Theodorus Marinus ; Broekman, Hans</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11538908B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Donkers, Johannes Josephus Theodorus Marinus</creatorcontrib><creatorcontrib>Broekman, Hans</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Donkers, Johannes Josephus Theodorus Marinus</au><au>Broekman, Hans</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device</title><date>2022-12-27</date><risdate>2022</risdate><abstract>A semiconductor device (100, 100′, 100″) and a method for manufacturing a semiconductor device (100, 100′, 100″). The semiconductor device (100, 100′, 100″) includes a substrate (104, 106), a GaN layer (112), and an AlGaN layer (114). The GaN layer (112) is located between the substrate (104, 106) and the AlGaN layer (114). The device further includes at least one contact (130, 132, 134), comprising a central portion (150) and an edge portion (152), and a passivation layer (160) located at least between the edge portion (152) of the contact (130, 132, 134) and the AlGaN layer (114). The edge portion (152) is spaced apart from an upper surface of the passivation layer (160). The edge portion (152) may be spaced apart from the passivation layer (160) by a further layer (170) or by an air gap (172).</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor device |
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