Error correction circuit and method for operating the same

An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable n...

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Hauptverfasser: Jun, Bohwan, Shin, Dong-min, Yu, Geunyeong, Kwak, Hee Youl, Lee, Kangseok, Son, Hong Rak
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creator Jun, Bohwan
Shin, Dong-min
Yu, Geunyeong
Kwak, Hee Youl
Lee, Kangseok
Son, Hong Rak
description An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable node based on the at least one decoding parameter, and decides a decoding rule necessary for decoding of the one bit based on the degree of the first variable node, and an adaptive decoding controller that outputs corrected data based on a decoding result of the LDPC decoder.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11531588B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11531588B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11531588B23</originalsourceid><addsrcrecordid>eNrjZLByLSrKL1JIzi8qSk0uyczPU0jOLEouzSxRSMxLUchNLcnIT1FIA6rIL0gtSizJzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGhqbGhqYWFk5GxsSoAQCAYC81</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Error correction circuit and method for operating the same</title><source>esp@cenet</source><creator>Jun, Bohwan ; Shin, Dong-min ; Yu, Geunyeong ; Kwak, Hee Youl ; Lee, Kangseok ; Son, Hong Rak</creator><creatorcontrib>Jun, Bohwan ; Shin, Dong-min ; Yu, Geunyeong ; Kwak, Hee Youl ; Lee, Kangseok ; Son, Hong Rak</creatorcontrib><description>An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable node based on the at least one decoding parameter, and decides a decoding rule necessary for decoding of the one bit based on the degree of the first variable node, and an adaptive decoding controller that outputs corrected data based on a decoding result of the LDPC decoder.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; CODE CONVERSION IN GENERAL ; CODING ; COMPUTING ; COUNTING ; DECODING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221220&amp;DB=EPODOC&amp;CC=US&amp;NR=11531588B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221220&amp;DB=EPODOC&amp;CC=US&amp;NR=11531588B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Jun, Bohwan</creatorcontrib><creatorcontrib>Shin, Dong-min</creatorcontrib><creatorcontrib>Yu, Geunyeong</creatorcontrib><creatorcontrib>Kwak, Hee Youl</creatorcontrib><creatorcontrib>Lee, Kangseok</creatorcontrib><creatorcontrib>Son, Hong Rak</creatorcontrib><title>Error correction circuit and method for operating the same</title><description>An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable node based on the at least one decoding parameter, and decides a decoding rule necessary for decoding of the one bit based on the degree of the first variable node, and an adaptive decoding controller that outputs corrected data based on a decoding result of the LDPC decoder.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>DECODING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLByLSrKL1JIzi8qSk0uyczPU0jOLEouzSxRSMxLUchNLcnIT1FIA6rIL0gtSizJzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGhqbGhqYWFk5GxsSoAQCAYC81</recordid><startdate>20221220</startdate><enddate>20221220</enddate><creator>Jun, Bohwan</creator><creator>Shin, Dong-min</creator><creator>Yu, Geunyeong</creator><creator>Kwak, Hee Youl</creator><creator>Lee, Kangseok</creator><creator>Son, Hong Rak</creator><scope>EVB</scope></search><sort><creationdate>20221220</creationdate><title>Error correction circuit and method for operating the same</title><author>Jun, Bohwan ; Shin, Dong-min ; Yu, Geunyeong ; Kwak, Hee Youl ; Lee, Kangseok ; Son, Hong Rak</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11531588B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>DECODING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Jun, Bohwan</creatorcontrib><creatorcontrib>Shin, Dong-min</creatorcontrib><creatorcontrib>Yu, Geunyeong</creatorcontrib><creatorcontrib>Kwak, Hee Youl</creatorcontrib><creatorcontrib>Lee, Kangseok</creatorcontrib><creatorcontrib>Son, Hong Rak</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Jun, Bohwan</au><au>Shin, Dong-min</au><au>Yu, Geunyeong</au><au>Kwak, Hee Youl</au><au>Lee, Kangseok</au><au>Son, Hong Rak</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Error correction circuit and method for operating the same</title><date>2022-12-20</date><risdate>2022</risdate><abstract>An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable node based on the at least one decoding parameter, and decides a decoding rule necessary for decoding of the one bit based on the degree of the first variable node, and an adaptive decoding controller that outputs corrected data based on a decoding result of the LDPC decoder.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRONIC CIRCUITRY
CALCULATING
CODE CONVERSION IN GENERAL
CODING
COMPUTING
COUNTING
DECODING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
title Error correction circuit and method for operating the same
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T01%3A12%3A52IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Jun,%20Bohwan&rft.date=2022-12-20&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11531588B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true