Multi-level vertical memory device including inter-level channel connector

A semiconductor device includes a string of transistors stacked along a vertical direction above a substrate of the semiconductor device. The string can include a first substring, a channel connector disposed above the first substring, and a second substring. The first substring includes a first cha...

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Bibliographische Detailangaben

Hauptverfasser:	Tao, Qian, Wang, Enbo, Zhang, Ruo Fang, Yang, Haohao, Xu, Qianbing, Hu, Yushi
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRICITY
Online-Zugang:	Volltext bestellen
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