System and method for single-stage frequency-domain equalization

System and method for single-stage frequency-domain equalization

The disclosed systems, structures, and methods are directed to a single-stage frequency-domain equalization (FDEQ) structure implemented on a processor, comprising a data preprocessing unit configured to concatenate received data samples in time-domain digital signals, transform the concatenated dat...

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Hauptverfasser: Li, Chuandong, Ke, Jianhong
Format: Patent
Sprache:eng
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION
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creator Li, Chuandong
Ke, Jianhong
description The disclosed systems, structures, and methods are directed to a single-stage frequency-domain equalization (FDEQ) structure implemented on a processor, comprising a data preprocessing unit configured to concatenate received data samples in time-domain digital signals, transform the concatenated data samples in the time-domain digital signals to frequency-domain digital signals, and an adaptive equalizer comprising 2×2 multiple-input multiple output (MIMO) configured to compensate for non-time-varying fixed impairments and time-varying adaptive impairments in the frequency-domain digital signals.
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Ke, Jianhong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11489595B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION</topic><toplevel>online_resources</toplevel><creatorcontrib>Li, Chuandong</creatorcontrib><creatorcontrib>Ke, Jianhong</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Li, Chuandong</au><au>Ke, Jianhong</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System and method for single-stage frequency-domain equalization</title><date>2022-11-01</date><risdate>2022</risdate><abstract>The disclosed systems, structures, and methods are directed to a single-stage frequency-domain equalization (FDEQ) structure implemented on a processor, comprising a data preprocessing unit configured to concatenate received data samples in time-domain digital signals, transform the concatenated data samples in the time-domain digital signals to frequency-domain digital signals, and an adaptive equalizer comprising 2×2 multiple-input multiple output (MIMO) configured to compensate for non-time-varying fixed impairments and time-varying adaptive impairments in the frequency-domain digital signals.</abstract><oa>free_for_read</oa></addata></record>
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION
title System and method for single-stage frequency-domain equalization
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