Priority queue sorting system and method with deterministic and bounded latency

A priority queue sorting system including a priority queue and a message storage. The priority queue includes multiple priority blocks that are cascaded in order from a lowest priority block to a highest priority block. Each priority block includes a register block storing an address and an identifi...

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Hauptverfasser: Gauthier, Claude Robert, Deb, Abhijit Kumar, Pannell, Donald Robert
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creator Gauthier, Claude Robert
Deb, Abhijit Kumar
Pannell, Donald Robert
description A priority queue sorting system including a priority queue and a message storage. The priority queue includes multiple priority blocks that are cascaded in order from a lowest priority block to a highest priority block. Each priority block includes a register block storing an address and an identifier, compare circuitry that compares a new identifier with the stored identifier for determining relative priority, and select circuitry that determines whether to keep or shift and replace the stored address and identifier within the priority queue based on the relative priority. The message storage stores message payloads, each pointed to by a corresponding stored address of a corresponding priority block. Each priority block contains its own compare and select circuitry and determines a keep, shift, or store operation. Thus, sorting is independent of the length of the priority queue thereby achieving deterministic sorting latency that is independent of the queue length.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11487682B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11487682B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11487682B13</originalsourceid><addsrcrecordid>eNqNysEOATEURuFuLATvcD2ARRFmTYgdCdaTmv5jbjJtR3sb6dtLxANYncV3xup8iRwiS6FXRgalEIX9k1JJAkfGW3KQLlh6s3RkIYiOPSfh5quPkL2Fpd4IfFOmatSaPmH260TNj4fb_rTAEGqkwTTwkPp-1XpdbTfVcqdX_zwfuH83zA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Priority queue sorting system and method with deterministic and bounded latency</title><source>esp@cenet</source><creator>Gauthier, Claude Robert ; Deb, Abhijit Kumar ; Pannell, Donald Robert</creator><creatorcontrib>Gauthier, Claude Robert ; Deb, Abhijit Kumar ; Pannell, Donald Robert</creatorcontrib><description>A priority queue sorting system including a priority queue and a message storage. The priority queue includes multiple priority blocks that are cascaded in order from a lowest priority block to a highest priority block. Each priority block includes a register block storing an address and an identifier, compare circuitry that compares a new identifier with the stored identifier for determining relative priority, and select circuitry that determines whether to keep or shift and replace the stored address and identifier within the priority queue based on the relative priority. The message storage stores message payloads, each pointed to by a corresponding stored address of a corresponding priority block. Each priority block contains its own compare and select circuitry and determines a keep, shift, or store operation. Thus, sorting is independent of the length of the priority queue thereby achieving deterministic sorting latency that is independent of the queue length.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221101&amp;DB=EPODOC&amp;CC=US&amp;NR=11487682B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221101&amp;DB=EPODOC&amp;CC=US&amp;NR=11487682B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Gauthier, Claude Robert</creatorcontrib><creatorcontrib>Deb, Abhijit Kumar</creatorcontrib><creatorcontrib>Pannell, Donald Robert</creatorcontrib><title>Priority queue sorting system and method with deterministic and bounded latency</title><description>A priority queue sorting system including a priority queue and a message storage. The priority queue includes multiple priority blocks that are cascaded in order from a lowest priority block to a highest priority block. Each priority block includes a register block storing an address and an identifier, compare circuitry that compares a new identifier with the stored identifier for determining relative priority, and select circuitry that determines whether to keep or shift and replace the stored address and identifier within the priority queue based on the relative priority. The message storage stores message payloads, each pointed to by a corresponding stored address of a corresponding priority block. Each priority block contains its own compare and select circuitry and determines a keep, shift, or store operation. Thus, sorting is independent of the length of the priority queue thereby achieving deterministic sorting latency that is independent of the queue length.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNysEOATEURuFuLATvcD2ARRFmTYgdCdaTmv5jbjJtR3sb6dtLxANYncV3xup8iRwiS6FXRgalEIX9k1JJAkfGW3KQLlh6s3RkIYiOPSfh5quPkL2Fpd4IfFOmatSaPmH260TNj4fb_rTAEGqkwTTwkPp-1XpdbTfVcqdX_zwfuH83zA</recordid><startdate>20221101</startdate><enddate>20221101</enddate><creator>Gauthier, Claude Robert</creator><creator>Deb, Abhijit Kumar</creator><creator>Pannell, Donald Robert</creator><scope>EVB</scope></search><sort><creationdate>20221101</creationdate><title>Priority queue sorting system and method with deterministic and bounded latency</title><author>Gauthier, Claude Robert ; Deb, Abhijit Kumar ; Pannell, Donald Robert</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11487682B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Gauthier, Claude Robert</creatorcontrib><creatorcontrib>Deb, Abhijit Kumar</creatorcontrib><creatorcontrib>Pannell, Donald Robert</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gauthier, Claude Robert</au><au>Deb, Abhijit Kumar</au><au>Pannell, Donald Robert</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Priority queue sorting system and method with deterministic and bounded latency</title><date>2022-11-01</date><risdate>2022</risdate><abstract>A priority queue sorting system including a priority queue and a message storage. The priority queue includes multiple priority blocks that are cascaded in order from a lowest priority block to a highest priority block. Each priority block includes a register block storing an address and an identifier, compare circuitry that compares a new identifier with the stored identifier for determining relative priority, and select circuitry that determines whether to keep or shift and replace the stored address and identifier within the priority queue based on the relative priority. The message storage stores message payloads, each pointed to by a corresponding stored address of a corresponding priority block. Each priority block contains its own compare and select circuitry and determines a keep, shift, or store operation. Thus, sorting is independent of the length of the priority queue thereby achieving deterministic sorting latency that is independent of the queue length.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Priority queue sorting system and method with deterministic and bounded latency
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-23T03%3A04%3A52IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Gauthier,%20Claude%20Robert&rft.date=2022-11-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11487682B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true