Method of forming material film, integrated circuit device, and method of manufacturing the integrated circuit device
To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto...
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| creator | Kim, Iksoo Im, Jiwoon Mun, Geumbi Lee, Junwon Hwang, Kwangtae Kim, Jinyong |
| description | To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11450554B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11450554B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11450554B23</originalsourceid><addsrcrecordid>eNqNjLsKwkAQRbexEPUfxj6C0ewPRBQbK7UOw-5sMrCPsJn1-1UQO8HqwuGcO1flQjIkC8mBSzlw7CGgUGb04NiHCjgK9fnFLBjOprCApQcbqgCjhfDtA8bi0EjJ7xcZ6He6VDOHfqLVZxdqfTreDucNjamjaURDkaS7X-u60Vutm3a3_8d5AqyiRSs</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of forming material film, integrated circuit device, and method of manufacturing the integrated circuit device</title><source>esp@cenet</source><creator>Kim, Iksoo ; Im, Jiwoon ; Mun, Geumbi ; Lee, Junwon ; Hwang, Kwangtae ; Kim, Jinyong</creator><creatorcontrib>Kim, Iksoo ; Im, Jiwoon ; Mun, Geumbi ; Lee, Junwon ; Hwang, Kwangtae ; Kim, Jinyong</creatorcontrib><description>To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220920&DB=EPODOC&CC=US&NR=11450554B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25566,76549</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220920&DB=EPODOC&CC=US&NR=11450554B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kim, Iksoo</creatorcontrib><creatorcontrib>Im, Jiwoon</creatorcontrib><creatorcontrib>Mun, Geumbi</creatorcontrib><creatorcontrib>Lee, Junwon</creatorcontrib><creatorcontrib>Hwang, Kwangtae</creatorcontrib><creatorcontrib>Kim, Jinyong</creatorcontrib><title>Method of forming material film, integrated circuit device, and method of manufacturing the integrated circuit device</title><description>To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLsKwkAQRbexEPUfxj6C0ewPRBQbK7UOw-5sMrCPsJn1-1UQO8HqwuGcO1flQjIkC8mBSzlw7CGgUGb04NiHCjgK9fnFLBjOprCApQcbqgCjhfDtA8bi0EjJ7xcZ6He6VDOHfqLVZxdqfTreDucNjamjaURDkaS7X-u60Vutm3a3_8d5AqyiRSs</recordid><startdate>20220920</startdate><enddate>20220920</enddate><creator>Kim, Iksoo</creator><creator>Im, Jiwoon</creator><creator>Mun, Geumbi</creator><creator>Lee, Junwon</creator><creator>Hwang, Kwangtae</creator><creator>Kim, Jinyong</creator><scope>EVB</scope></search><sort><creationdate>20220920</creationdate><title>Method of forming material film, integrated circuit device, and method of manufacturing the integrated circuit device</title><author>Kim, Iksoo ; Im, Jiwoon ; Mun, Geumbi ; Lee, Junwon ; Hwang, Kwangtae ; Kim, Jinyong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11450554B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Kim, Iksoo</creatorcontrib><creatorcontrib>Im, Jiwoon</creatorcontrib><creatorcontrib>Mun, Geumbi</creatorcontrib><creatorcontrib>Lee, Junwon</creatorcontrib><creatorcontrib>Hwang, Kwangtae</creatorcontrib><creatorcontrib>Kim, Jinyong</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kim, Iksoo</au><au>Im, Jiwoon</au><au>Mun, Geumbi</au><au>Lee, Junwon</au><au>Hwang, Kwangtae</au><au>Kim, Jinyong</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of forming material film, integrated circuit device, and method of manufacturing the integrated circuit device</title><date>2022-09-20</date><risdate>2022</risdate><abstract>To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Method of forming material film, integrated circuit device, and method of manufacturing the integrated circuit device |
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