Semiconductor package having partial outer metal layer and packaging method thereof

A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation...

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Hauptverfasser: Hsu, Kun-Chi, Chen, Ying-Lin, Chen, Shih-Chun, Wu, Ting-Yeh, Tseng, Sheng-Tou, Wu, Chin-Ta
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creator Hsu, Kun-Chi
Chen, Ying-Lin
Chen, Shih-Chun
Wu, Ting-Yeh
Tseng, Sheng-Tou
Wu, Chin-Ta
description A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11410945B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11410945B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11410945B23</originalsourceid><addsrcrecordid>eNrjZAgOTs3NTM7PSylNLskvUihITM5OTE9VyEgsy8xLB3KLSjITcxTyS0tSixRyU0uA7JzESiA7MS8FqhikDiiTkZ-iUJKRWpSan8bDwJqWmFOcyguluRkU3VxDnD10Uwvy41OLgdpS81JL4kODDQ1NDA0sTUydjIyJUQMAihM42g</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor package having partial outer metal layer and packaging method thereof</title><source>esp@cenet</source><creator>Hsu, Kun-Chi ; Chen, Ying-Lin ; Chen, Shih-Chun ; Wu, Ting-Yeh ; Tseng, Sheng-Tou ; Wu, Chin-Ta</creator><creatorcontrib>Hsu, Kun-Chi ; Chen, Ying-Lin ; Chen, Shih-Chun ; Wu, Ting-Yeh ; Tseng, Sheng-Tou ; Wu, Chin-Ta</creatorcontrib><description>A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.</description><language>eng</language><subject>ANTENNAS, i.e. RADIO AERIALS ; BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220809&amp;DB=EPODOC&amp;CC=US&amp;NR=11410945B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220809&amp;DB=EPODOC&amp;CC=US&amp;NR=11410945B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Hsu, Kun-Chi</creatorcontrib><creatorcontrib>Chen, Ying-Lin</creatorcontrib><creatorcontrib>Chen, Shih-Chun</creatorcontrib><creatorcontrib>Wu, Ting-Yeh</creatorcontrib><creatorcontrib>Tseng, Sheng-Tou</creatorcontrib><creatorcontrib>Wu, Chin-Ta</creatorcontrib><title>Semiconductor package having partial outer metal layer and packaging method thereof</title><description>A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.</description><subject>ANTENNAS, i.e. RADIO AERIALS</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZAgOTs3NTM7PSylNLskvUihITM5OTE9VyEgsy8xLB3KLSjITcxTyS0tSixRyU0uA7JzESiA7MS8FqhikDiiTkZ-iUJKRWpSan8bDwJqWmFOcyguluRkU3VxDnD10Uwvy41OLgdpS81JL4kODDQ1NDA0sTUydjIyJUQMAihM42g</recordid><startdate>20220809</startdate><enddate>20220809</enddate><creator>Hsu, Kun-Chi</creator><creator>Chen, Ying-Lin</creator><creator>Chen, Shih-Chun</creator><creator>Wu, Ting-Yeh</creator><creator>Tseng, Sheng-Tou</creator><creator>Wu, Chin-Ta</creator><scope>EVB</scope></search><sort><creationdate>20220809</creationdate><title>Semiconductor package having partial outer metal layer and packaging method thereof</title><author>Hsu, Kun-Chi ; Chen, Ying-Lin ; Chen, Shih-Chun ; Wu, Ting-Yeh ; Tseng, Sheng-Tou ; Wu, Chin-Ta</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11410945B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>ANTENNAS, i.e. RADIO AERIALS</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Hsu, Kun-Chi</creatorcontrib><creatorcontrib>Chen, Ying-Lin</creatorcontrib><creatorcontrib>Chen, Shih-Chun</creatorcontrib><creatorcontrib>Wu, Ting-Yeh</creatorcontrib><creatorcontrib>Tseng, Sheng-Tou</creatorcontrib><creatorcontrib>Wu, Chin-Ta</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hsu, Kun-Chi</au><au>Chen, Ying-Lin</au><au>Chen, Shih-Chun</au><au>Wu, Ting-Yeh</au><au>Tseng, Sheng-Tou</au><au>Wu, Chin-Ta</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor package having partial outer metal layer and packaging method thereof</title><date>2022-08-09</date><risdate>2022</risdate><abstract>A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.</abstract><oa>free_for_read</oa></addata></record>
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subjects ANTENNAS, i.e. RADIO AERIALS
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor package having partial outer metal layer and packaging method thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T21%3A16%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Hsu,%20Kun-Chi&rft.date=2022-08-09&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11410945B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true