Machine learning network implemented by statically scheduled instructions, with system-on-chip
A compiler receives a description of a machine learning network and generates a computer program that implements the machine learning network. The computer program includes statically scheduled instructions that are executed by a mesh of processing elements (Tiles). The instructions executed by the...
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| creator | Attia, Sedny S. J Chobe, Yogesh Laxmikant Iskarous, Moenes Zaher Prasad, Kavitha Shah, Nishit Gilliland, Spenser Don Dhruvanarayan, Srivathsa Kotler, Reed |
| description | A compiler receives a description of a machine learning network and generates a computer program that implements the machine learning network. The computer program includes statically scheduled instructions that are executed by a mesh of processing elements (Tiles). The instructions executed by the Tiles are statically scheduled because the compiler can determine which instructions are executed by which Tiles at what times. For example, for the statically scheduled instructions, there are no conditions, branching or data dependencies that can be resolved only at run-time, and which would affect the timing and order of the execution of the instructions. |
| format | Patent |
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| subjects | CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Machine learning network implemented by statically scheduled instructions, with system-on-chip |
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