Package substrate and semiconductor package including the same
Provided a package substrate including an insulation substrate, a conductive layer provided in the insulation substrate, upper pads provided on an upper surface of the insulation substrate and electrically connected to the conductive layer, lower pads provided on a lower surface of the insulation su...
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creator | Jeong, Seongwon Ha, Sangsu Kim, Byungwook Kim, Ayoung |
description | Provided a package substrate including an insulation substrate, a conductive layer provided in the insulation substrate, upper pads provided on an upper surface of the insulation substrate and electrically connected to the conductive layer, lower pads provided on a lower surface of the insulation substrate and electrically connected to the conductive layer, and at least one trench provided at a portion of the insulation substrate adjacent to at least one of the upper pads and configured to block stress, which is generated by an expansion of the insulation substrate, from spreading to the at least one of the upper pads. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11342283B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11342283B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11342283B23</originalsourceid><addsrcrecordid>eNrjZLALSEzOTkxPVSguTSouKUosSVVIzEtRKE7NzUzOz0spTS7JL1IogKrJzEvOKU3JzEtXKMkA6kjMTeVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFQI2peakl8aHBhobGJkZGFsZORsbEqAEAcnQw1A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Package substrate and semiconductor package including the same</title><source>esp@cenet</source><creator>Jeong, Seongwon ; Ha, Sangsu ; Kim, Byungwook ; Kim, Ayoung</creator><creatorcontrib>Jeong, Seongwon ; Ha, Sangsu ; Kim, Byungwook ; Kim, Ayoung</creatorcontrib><description>Provided a package substrate including an insulation substrate, a conductive layer provided in the insulation substrate, upper pads provided on an upper surface of the insulation substrate and electrically connected to the conductive layer, lower pads provided on a lower surface of the insulation substrate and electrically connected to the conductive layer, and at least one trench provided at a portion of the insulation substrate adjacent to at least one of the upper pads and configured to block stress, which is generated by an expansion of the insulation substrate, from spreading to the at least one of the upper pads.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220524&DB=EPODOC&CC=US&NR=11342283B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220524&DB=EPODOC&CC=US&NR=11342283B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Jeong, Seongwon</creatorcontrib><creatorcontrib>Ha, Sangsu</creatorcontrib><creatorcontrib>Kim, Byungwook</creatorcontrib><creatorcontrib>Kim, Ayoung</creatorcontrib><title>Package substrate and semiconductor package including the same</title><description>Provided a package substrate including an insulation substrate, a conductive layer provided in the insulation substrate, upper pads provided on an upper surface of the insulation substrate and electrically connected to the conductive layer, lower pads provided on a lower surface of the insulation substrate and electrically connected to the conductive layer, and at least one trench provided at a portion of the insulation substrate adjacent to at least one of the upper pads and configured to block stress, which is generated by an expansion of the insulation substrate, from spreading to the at least one of the upper pads.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLALSEzOTkxPVSguTSouKUosSVVIzEtRKE7NzUzOz0spTS7JL1IogKrJzEvOKU3JzEtXKMkA6kjMTeVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFQI2peakl8aHBhobGJkZGFsZORsbEqAEAcnQw1A</recordid><startdate>20220524</startdate><enddate>20220524</enddate><creator>Jeong, Seongwon</creator><creator>Ha, Sangsu</creator><creator>Kim, Byungwook</creator><creator>Kim, Ayoung</creator><scope>EVB</scope></search><sort><creationdate>20220524</creationdate><title>Package substrate and semiconductor package including the same</title><author>Jeong, Seongwon ; Ha, Sangsu ; Kim, Byungwook ; Kim, Ayoung</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11342283B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Jeong, Seongwon</creatorcontrib><creatorcontrib>Ha, Sangsu</creatorcontrib><creatorcontrib>Kim, Byungwook</creatorcontrib><creatorcontrib>Kim, Ayoung</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Jeong, Seongwon</au><au>Ha, Sangsu</au><au>Kim, Byungwook</au><au>Kim, Ayoung</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Package substrate and semiconductor package including the same</title><date>2022-05-24</date><risdate>2022</risdate><abstract>Provided a package substrate including an insulation substrate, a conductive layer provided in the insulation substrate, upper pads provided on an upper surface of the insulation substrate and electrically connected to the conductive layer, lower pads provided on a lower surface of the insulation substrate and electrically connected to the conductive layer, and at least one trench provided at a portion of the insulation substrate adjacent to at least one of the upper pads and configured to block stress, which is generated by an expansion of the insulation substrate, from spreading to the at least one of the upper pads.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Package substrate and semiconductor package including the same |
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