Memory controller, memory device and memory system having improved threshold voltage distribution characteristics and related operating methods
Provided are a memory controller and memory system having an improved threshold voltage distribution characteristic and an operating method of the memory system. As a write request of data with respect to a first block is received, an erase program interval (EPI) is determined denoting a time period...
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| creator | Yu, Jaeduk Shim, Dongkyo |
| description | Provided are a memory controller and memory system having an improved threshold voltage distribution characteristic and an operating method of the memory system. As a write request of data with respect to a first block is received, an erase program interval (EPI) is determined denoting a time period elapsed after erasure of the first block. When the determined EPI is equal to or less than a reference time, data is programmed to the first block based on a first operation condition selected from among a plurality of operation conditions. When the determined EPI is greater than the reference time, the data is programmed to the first block based on a second operation condition selected from among the plurality of operation conditions. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11315649B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11315649B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11315649B23</originalsourceid><addsrcrecordid>eNqNjLtuAjEQRbehiIB_mPShWEiQaBOBaKgSajSxL9iS7VmNh5X4Cn45hEdPdaWje85Lc94gi57ISTGVlKBvlG_Io48OxMU_SD1VQ6bAfSwHirlT6eHJgqIGSZ56ScYHkI_VNP4eLUohF1jZGfQCo6vXoCKxXVTpoGz_tQwL4uuoGew5VYzvO2xeV8ufr_UEnexQO3YosN32u21n7cf8ffE5nT3z-QM_CVDY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Memory controller, memory device and memory system having improved threshold voltage distribution characteristics and related operating methods</title><source>esp@cenet</source><creator>Yu, Jaeduk ; Shim, Dongkyo</creator><creatorcontrib>Yu, Jaeduk ; Shim, Dongkyo</creatorcontrib><description>Provided are a memory controller and memory system having an improved threshold voltage distribution characteristic and an operating method of the memory system. As a write request of data with respect to a first block is received, an erase program interval (EPI) is determined denoting a time period elapsed after erasure of the first block. When the determined EPI is equal to or less than a reference time, data is programmed to the first block based on a first operation condition selected from among a plurality of operation conditions. When the determined EPI is greater than the reference time, the data is programmed to the first block based on a second operation condition selected from among the plurality of operation conditions.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; SEMICONDUCTOR DEVICES ; STATIC STORES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220426&DB=EPODOC&CC=US&NR=11315649B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220426&DB=EPODOC&CC=US&NR=11315649B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Yu, Jaeduk</creatorcontrib><creatorcontrib>Shim, Dongkyo</creatorcontrib><title>Memory controller, memory device and memory system having improved threshold voltage distribution characteristics and related operating methods</title><description>Provided are a memory controller and memory system having an improved threshold voltage distribution characteristic and an operating method of the memory system. As a write request of data with respect to a first block is received, an erase program interval (EPI) is determined denoting a time period elapsed after erasure of the first block. When the determined EPI is equal to or less than a reference time, data is programmed to the first block based on a first operation condition selected from among a plurality of operation conditions. When the determined EPI is greater than the reference time, the data is programmed to the first block based on a second operation condition selected from among the plurality of operation conditions.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLtuAjEQRbehiIB_mPShWEiQaBOBaKgSajSxL9iS7VmNh5X4Cn45hEdPdaWje85Lc94gi57ISTGVlKBvlG_Io48OxMU_SD1VQ6bAfSwHirlT6eHJgqIGSZ56ScYHkI_VNP4eLUohF1jZGfQCo6vXoCKxXVTpoGz_tQwL4uuoGew5VYzvO2xeV8ufr_UEnexQO3YosN32u21n7cf8ffE5nT3z-QM_CVDY</recordid><startdate>20220426</startdate><enddate>20220426</enddate><creator>Yu, Jaeduk</creator><creator>Shim, Dongkyo</creator><scope>EVB</scope></search><sort><creationdate>20220426</creationdate><title>Memory controller, memory device and memory system having improved threshold voltage distribution characteristics and related operating methods</title><author>Yu, Jaeduk ; Shim, Dongkyo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11315649B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Yu, Jaeduk</creatorcontrib><creatorcontrib>Shim, Dongkyo</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yu, Jaeduk</au><au>Shim, Dongkyo</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Memory controller, memory device and memory system having improved threshold voltage distribution characteristics and related operating methods</title><date>2022-04-26</date><risdate>2022</risdate><abstract>Provided are a memory controller and memory system having an improved threshold voltage distribution characteristic and an operating method of the memory system. As a write request of data with respect to a first block is received, an erase program interval (EPI) is determined denoting a time period elapsed after erasure of the first block. When the determined EPI is equal to or less than a reference time, data is programmed to the first block based on a first operation condition selected from among a plurality of operation conditions. When the determined EPI is greater than the reference time, the data is programmed to the first block based on a second operation condition selected from among the plurality of operation conditions.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES |
| title | Memory controller, memory device and memory system having improved threshold voltage distribution characteristics and related operating methods |
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