Current-based track and hold circuit

A sample-and-hold circuit includes a first input resistor, a first transistor, a first capacitor, a second resistor, and a first current source device. A first current terminal of the first transistor is coupled to the first input resistor. A first terminal of the first capacitor is coupled to the s...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Mathew, Joseph Palackal, Dusad, Shagun, Pentakota, Visvesvaraya Appala, K, Prasanth, Nurani, Sai Aditya Krishnaswamy
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Mathew, Joseph Palackal
Dusad, Shagun
Pentakota, Visvesvaraya Appala
K, Prasanth
Nurani, Sai Aditya Krishnaswamy
description A sample-and-hold circuit includes a first input resistor, a first transistor, a first capacitor, a second resistor, and a first current source device. A first current terminal of the first transistor is coupled to the first input resistor. A first terminal of the first capacitor is coupled to the second current terminal of the first transistor at a first output node. A first terminal of the second resistor is coupled to the second terminal of the first transistor at the first output node. The first current source device is coupled the first input resistor and to the first current terminal of the first transistor.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11277145B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11277145B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11277145B23</originalsourceid><addsrcrecordid>eNrjZFBxLi0qSs0r0U1KLE5NUSgpSkzOVkjMS1HIyM9JUUjOLEouzSzhYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGhkbm5oYmpk5GxsSoAQD2Ryao</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Current-based track and hold circuit</title><source>esp@cenet</source><creator>Mathew, Joseph Palackal ; Dusad, Shagun ; Pentakota, Visvesvaraya Appala ; K, Prasanth ; Nurani, Sai Aditya Krishnaswamy</creator><creatorcontrib>Mathew, Joseph Palackal ; Dusad, Shagun ; Pentakota, Visvesvaraya Appala ; K, Prasanth ; Nurani, Sai Aditya Krishnaswamy</creatorcontrib><description>A sample-and-hold circuit includes a first input resistor, a first transistor, a first capacitor, a second resistor, and a first current source device. A first current terminal of the first transistor is coupled to the first input resistor. A first terminal of the first capacitor is coupled to the second current terminal of the first transistor at a first output node. A first terminal of the second resistor is coupled to the second terminal of the first transistor at the first output node. The first current source device is coupled the first input resistor and to the first current terminal of the first transistor.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220315&amp;DB=EPODOC&amp;CC=US&amp;NR=11277145B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220315&amp;DB=EPODOC&amp;CC=US&amp;NR=11277145B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Mathew, Joseph Palackal</creatorcontrib><creatorcontrib>Dusad, Shagun</creatorcontrib><creatorcontrib>Pentakota, Visvesvaraya Appala</creatorcontrib><creatorcontrib>K, Prasanth</creatorcontrib><creatorcontrib>Nurani, Sai Aditya Krishnaswamy</creatorcontrib><title>Current-based track and hold circuit</title><description>A sample-and-hold circuit includes a first input resistor, a first transistor, a first capacitor, a second resistor, and a first current source device. A first current terminal of the first transistor is coupled to the first input resistor. A first terminal of the first capacitor is coupled to the second current terminal of the first transistor at a first output node. A first terminal of the second resistor is coupled to the second terminal of the first transistor at the first output node. The first current source device is coupled the first input resistor and to the first current terminal of the first transistor.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBxLi0qSs0r0U1KLE5NUSgpSkzOVkjMS1HIyM9JUUjOLEouzSzhYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGhkbm5oYmpk5GxsSoAQD2Ryao</recordid><startdate>20220315</startdate><enddate>20220315</enddate><creator>Mathew, Joseph Palackal</creator><creator>Dusad, Shagun</creator><creator>Pentakota, Visvesvaraya Appala</creator><creator>K, Prasanth</creator><creator>Nurani, Sai Aditya Krishnaswamy</creator><scope>EVB</scope></search><sort><creationdate>20220315</creationdate><title>Current-based track and hold circuit</title><author>Mathew, Joseph Palackal ; Dusad, Shagun ; Pentakota, Visvesvaraya Appala ; K, Prasanth ; Nurani, Sai Aditya Krishnaswamy</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11277145B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Mathew, Joseph Palackal</creatorcontrib><creatorcontrib>Dusad, Shagun</creatorcontrib><creatorcontrib>Pentakota, Visvesvaraya Appala</creatorcontrib><creatorcontrib>K, Prasanth</creatorcontrib><creatorcontrib>Nurani, Sai Aditya Krishnaswamy</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mathew, Joseph Palackal</au><au>Dusad, Shagun</au><au>Pentakota, Visvesvaraya Appala</au><au>K, Prasanth</au><au>Nurani, Sai Aditya Krishnaswamy</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Current-based track and hold circuit</title><date>2022-03-15</date><risdate>2022</risdate><abstract>A sample-and-hold circuit includes a first input resistor, a first transistor, a first capacitor, a second resistor, and a first current source device. A first current terminal of the first transistor is coupled to the first input resistor. A first terminal of the first capacitor is coupled to the second current terminal of the first transistor at a first output node. A first terminal of the second resistor is coupled to the second terminal of the first transistor at the first output node. The first current source device is coupled the first input resistor and to the first current terminal of the first transistor.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US11277145B2
source esp@cenet
subjects BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
title Current-based track and hold circuit
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T07%3A05%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Mathew,%20Joseph%20Palackal&rft.date=2022-03-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11277145B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true