Enforcing central processing unit quality of service guarantees when servicing accelerator requests

Systems, apparatuses, and methods for enforcing processor quality of service guarantees when servicing system service requests (SSRs) are disclosed. A system includes a first processor executing an operating system and a second processor executing an application which generates SSRs for the first pr...

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Hauptverfasser: Greathouse, Joseph Lee, Basu, Arkaprava
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creator Greathouse, Joseph Lee
Basu, Arkaprava
description Systems, apparatuses, and methods for enforcing processor quality of service guarantees when servicing system service requests (SSRs) are disclosed. A system includes a first processor executing an operating system and a second processor executing an application which generates SSRs for the first processor to service. The first processor monitors the number of cycles spent servicing SSRs over a previous time interval, and if this number of cycles is above a threshold, the first processor starts delaying the servicing of subsequent SSRs. In one implementation, if the previous delay was non-zero, the first processor increases the delay used in the servicing of subsequent SSRs. If the number of cycles is less than or equal to the threshold, then the first processor services SSRs without delay. As the delay is increased, the second processor begins to stall and its SSR generation rate falls, reducing the load on the first processor.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11275613B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11275613B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11275613B23</originalsourceid><addsrcrecordid>eNqNjTEKwkAQRdNYiHqH8QAWSVB7JWKv1mFYfuLCspvMzCreXgM5gNWDx_v8ZeGa2CVxPvbkEE040CDJQXVSOXqjMXPw9qHUkUJe3oH6zMLRAKX3E3H204KdQ4CwJSHBmKGm62LRcVBsZq6K7aW5n687DKmFDvx7hrWPW1lWx_2hrE9V_U_zBTlzP84</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Enforcing central processing unit quality of service guarantees when servicing accelerator requests</title><source>esp@cenet</source><creator>Greathouse, Joseph Lee ; Basu, Arkaprava</creator><creatorcontrib>Greathouse, Joseph Lee ; Basu, Arkaprava</creatorcontrib><description>Systems, apparatuses, and methods for enforcing processor quality of service guarantees when servicing system service requests (SSRs) are disclosed. A system includes a first processor executing an operating system and a second processor executing an application which generates SSRs for the first processor to service. The first processor monitors the number of cycles spent servicing SSRs over a previous time interval, and if this number of cycles is above a threshold, the first processor starts delaying the servicing of subsequent SSRs. In one implementation, if the previous delay was non-zero, the first processor increases the delay used in the servicing of subsequent SSRs. If the number of cycles is less than or equal to the threshold, then the first processor services SSRs without delay. As the delay is increased, the second processor begins to stall and its SSR generation rate falls, reducing the load on the first processor.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220315&amp;DB=EPODOC&amp;CC=US&amp;NR=11275613B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220315&amp;DB=EPODOC&amp;CC=US&amp;NR=11275613B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Greathouse, Joseph Lee</creatorcontrib><creatorcontrib>Basu, Arkaprava</creatorcontrib><title>Enforcing central processing unit quality of service guarantees when servicing accelerator requests</title><description>Systems, apparatuses, and methods for enforcing processor quality of service guarantees when servicing system service requests (SSRs) are disclosed. A system includes a first processor executing an operating system and a second processor executing an application which generates SSRs for the first processor to service. The first processor monitors the number of cycles spent servicing SSRs over a previous time interval, and if this number of cycles is above a threshold, the first processor starts delaying the servicing of subsequent SSRs. In one implementation, if the previous delay was non-zero, the first processor increases the delay used in the servicing of subsequent SSRs. If the number of cycles is less than or equal to the threshold, then the first processor services SSRs without delay. As the delay is increased, the second processor begins to stall and its SSR generation rate falls, reducing the load on the first processor.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjTEKwkAQRdNYiHqH8QAWSVB7JWKv1mFYfuLCspvMzCreXgM5gNWDx_v8ZeGa2CVxPvbkEE040CDJQXVSOXqjMXPw9qHUkUJe3oH6zMLRAKX3E3H204KdQ4CwJSHBmKGm62LRcVBsZq6K7aW5n687DKmFDvx7hrWPW1lWx_2hrE9V_U_zBTlzP84</recordid><startdate>20220315</startdate><enddate>20220315</enddate><creator>Greathouse, Joseph Lee</creator><creator>Basu, Arkaprava</creator><scope>EVB</scope></search><sort><creationdate>20220315</creationdate><title>Enforcing central processing unit quality of service guarantees when servicing accelerator requests</title><author>Greathouse, Joseph Lee ; Basu, Arkaprava</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11275613B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Greathouse, Joseph Lee</creatorcontrib><creatorcontrib>Basu, Arkaprava</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Greathouse, Joseph Lee</au><au>Basu, Arkaprava</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Enforcing central processing unit quality of service guarantees when servicing accelerator requests</title><date>2022-03-15</date><risdate>2022</risdate><abstract>Systems, apparatuses, and methods for enforcing processor quality of service guarantees when servicing system service requests (SSRs) are disclosed. A system includes a first processor executing an operating system and a second processor executing an application which generates SSRs for the first processor to service. The first processor monitors the number of cycles spent servicing SSRs over a previous time interval, and if this number of cycles is above a threshold, the first processor starts delaying the servicing of subsequent SSRs. In one implementation, if the previous delay was non-zero, the first processor increases the delay used in the servicing of subsequent SSRs. If the number of cycles is less than or equal to the threshold, then the first processor services SSRs without delay. As the delay is increased, the second processor begins to stall and its SSR generation rate falls, reducing the load on the first processor.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Enforcing central processing unit quality of service guarantees when servicing accelerator requests
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-11T20%3A10%3A12IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Greathouse,%20Joseph%20Lee&rft.date=2022-03-15&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11275613B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true