Semiconductor device and method for manufacturing the same

Semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device is provided. A first substrate and at least one second substrate are provided. A single crystal lamination structure is formed on the first substrate. The single crystal lamination structure includes at least one hetero-material layer and at least on...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Zhang, Qingzhu, Xu, Renren, Yin, Huaxiang
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Zhang, Qingzhu
Xu, Renren
Yin, Huaxiang
description A method for manufacturing a semiconductor device is provided. A first substrate and at least one second substrate are provided. A single crystal lamination structure is formed on the first substrate. The single crystal lamination structure includes at least one hetero-material layer and at least one channel material layer that are alternately laminated, each of the at least one hetero-material layer is bonded to an adjacent one of the at least one channel material layer at a side away from the first substrate, and each of the at least one channel material layer is formed from one of the at least one second substrate. At least one layer of nanowire or nanosheet is formed from the single crystal lamination structure. A gate dielectric layer and a gate which surround each of the at least one layer of nanowire or nanosheet is formed. A semiconductor device is also provided.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11257933B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11257933B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11257933B23</originalsourceid><addsrcrecordid>eNrjZLAKTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUUgDiuYm5pWmJSaXlBZl5qUrlGSkKhQn5qbyMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDQyNTc0tjYycjY2LUAACQGS9Y</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and method for manufacturing the same</title><source>esp@cenet</source><creator>Zhang, Qingzhu ; Xu, Renren ; Yin, Huaxiang</creator><creatorcontrib>Zhang, Qingzhu ; Xu, Renren ; Yin, Huaxiang</creatorcontrib><description>A method for manufacturing a semiconductor device is provided. A first substrate and at least one second substrate are provided. A single crystal lamination structure is formed on the first substrate. The single crystal lamination structure includes at least one hetero-material layer and at least one channel material layer that are alternately laminated, each of the at least one hetero-material layer is bonded to an adjacent one of the at least one channel material layer at a side away from the first substrate, and each of the at least one channel material layer is formed from one of the at least one second substrate. At least one layer of nanowire or nanosheet is formed from the single crystal lamination structure. A gate dielectric layer and a gate which surround each of the at least one layer of nanowire or nanosheet is formed. A semiconductor device is also provided.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220222&amp;DB=EPODOC&amp;CC=US&amp;NR=11257933B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220222&amp;DB=EPODOC&amp;CC=US&amp;NR=11257933B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Zhang, Qingzhu</creatorcontrib><creatorcontrib>Xu, Renren</creatorcontrib><creatorcontrib>Yin, Huaxiang</creatorcontrib><title>Semiconductor device and method for manufacturing the same</title><description>A method for manufacturing a semiconductor device is provided. A first substrate and at least one second substrate are provided. A single crystal lamination structure is formed on the first substrate. The single crystal lamination structure includes at least one hetero-material layer and at least one channel material layer that are alternately laminated, each of the at least one hetero-material layer is bonded to an adjacent one of the at least one channel material layer at a side away from the first substrate, and each of the at least one channel material layer is formed from one of the at least one second substrate. At least one layer of nanowire or nanosheet is formed from the single crystal lamination structure. A gate dielectric layer and a gate which surround each of the at least one layer of nanowire or nanosheet is formed. A semiconductor device is also provided.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUUgDiuYm5pWmJSaXlBZl5qUrlGSkKhQn5qbyMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDQyNTc0tjYycjY2LUAACQGS9Y</recordid><startdate>20220222</startdate><enddate>20220222</enddate><creator>Zhang, Qingzhu</creator><creator>Xu, Renren</creator><creator>Yin, Huaxiang</creator><scope>EVB</scope></search><sort><creationdate>20220222</creationdate><title>Semiconductor device and method for manufacturing the same</title><author>Zhang, Qingzhu ; Xu, Renren ; Yin, Huaxiang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11257933B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Zhang, Qingzhu</creatorcontrib><creatorcontrib>Xu, Renren</creatorcontrib><creatorcontrib>Yin, Huaxiang</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zhang, Qingzhu</au><au>Xu, Renren</au><au>Yin, Huaxiang</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and method for manufacturing the same</title><date>2022-02-22</date><risdate>2022</risdate><abstract>A method for manufacturing a semiconductor device is provided. A first substrate and at least one second substrate are provided. A single crystal lamination structure is formed on the first substrate. The single crystal lamination structure includes at least one hetero-material layer and at least one channel material layer that are alternately laminated, each of the at least one hetero-material layer is bonded to an adjacent one of the at least one channel material layer at a side away from the first substrate, and each of the at least one channel material layer is formed from one of the at least one second substrate. At least one layer of nanowire or nanosheet is formed from the single crystal lamination structure. A gate dielectric layer and a gate which surround each of the at least one layer of nanowire or nanosheet is formed. A semiconductor device is also provided.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US11257933B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor device and method for manufacturing the same
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-06T17%3A25%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Zhang,%20Qingzhu&rft.date=2022-02-22&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11257933B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true