Semiconductor apparatus
A semiconductor apparatus that includes a semiconductor substrate having a first main surface and a second main surface, a first electrode opposing the first main surface of the semiconductor substrate, a dielectric layer between the semiconductor substrate and the first electrode, a second electrod...
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creator | Nakagawa, Hiroshi Ashimine, Tomoyuki Murase, Yasuhiro |
description | A semiconductor apparatus that includes a semiconductor substrate having a first main surface and a second main surface, a first electrode opposing the first main surface of the semiconductor substrate, a dielectric layer between the semiconductor substrate and the first electrode, a second electrode opposing the second main surface of the semiconductor substrate, and a resistance control layer between the semiconductor substrate and the second electrode. The resistance control layer includes a first region having a first electrical resistivity and electrically connecting the semiconductor substrate and the second electrode, and a second region having a second electrical resistivity higher than the first electrical resistivity of the first region and adjacent to the first region. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11239226B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11239226B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11239226B23</originalsourceid><addsrcrecordid>eNrjZBAPTs3NTM7PSylNLskvUkgsKEgsSiwpLeZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGRsaWRkZmTkbGxKgBAPh9InY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor apparatus</title><source>esp@cenet</source><creator>Nakagawa, Hiroshi ; Ashimine, Tomoyuki ; Murase, Yasuhiro</creator><creatorcontrib>Nakagawa, Hiroshi ; Ashimine, Tomoyuki ; Murase, Yasuhiro</creatorcontrib><description>A semiconductor apparatus that includes a semiconductor substrate having a first main surface and a second main surface, a first electrode opposing the first main surface of the semiconductor substrate, a dielectric layer between the semiconductor substrate and the first electrode, a second electrode opposing the second main surface of the semiconductor substrate, and a resistance control layer between the semiconductor substrate and the second electrode. The resistance control layer includes a first region having a first electrical resistivity and electrically connecting the semiconductor substrate and the second electrode, and a second region having a second electrical resistivity higher than the first electrical resistivity of the first region and adjacent to the first region.</description><language>eng</language><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS ; BASIC ELECTRIC ELEMENTS ; CONTROL OR REGULATION THEREOF ; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; GENERATION ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220201&DB=EPODOC&CC=US&NR=11239226B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25568,76551</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220201&DB=EPODOC&CC=US&NR=11239226B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Nakagawa, Hiroshi</creatorcontrib><creatorcontrib>Ashimine, Tomoyuki</creatorcontrib><creatorcontrib>Murase, Yasuhiro</creatorcontrib><title>Semiconductor apparatus</title><description>A semiconductor apparatus that includes a semiconductor substrate having a first main surface and a second main surface, a first electrode opposing the first main surface of the semiconductor substrate, a dielectric layer between the semiconductor substrate and the first electrode, a second electrode opposing the second main surface of the semiconductor substrate, and a resistance control layer between the semiconductor substrate and the second electrode. The resistance control layer includes a first region having a first electrical resistivity and electrically connecting the semiconductor substrate and the second electrode, and a second region having a second electrical resistivity higher than the first electrical resistivity of the first region and adjacent to the first region.</description><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CONTROL OR REGULATION THEREOF</subject><subject>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</subject><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>GENERATION</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAPTs3NTM7PSylNLskvUkgsKEgsSiwpLeZhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYaGRsaWRkZmTkbGxKgBAPh9InY</recordid><startdate>20220201</startdate><enddate>20220201</enddate><creator>Nakagawa, Hiroshi</creator><creator>Ashimine, Tomoyuki</creator><creator>Murase, Yasuhiro</creator><scope>EVB</scope></search><sort><creationdate>20220201</creationdate><title>Semiconductor apparatus</title><author>Nakagawa, Hiroshi ; Ashimine, Tomoyuki ; Murase, Yasuhiro</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11239226B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2022</creationdate><topic>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CONTROL OR REGULATION THEREOF</topic><topic>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</topic><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>GENERATION</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Nakagawa, Hiroshi</creatorcontrib><creatorcontrib>Ashimine, Tomoyuki</creatorcontrib><creatorcontrib>Murase, Yasuhiro</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nakagawa, Hiroshi</au><au>Ashimine, Tomoyuki</au><au>Murase, Yasuhiro</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor apparatus</title><date>2022-02-01</date><risdate>2022</risdate><abstract>A semiconductor apparatus that includes a semiconductor substrate having a first main surface and a second main surface, a first electrode opposing the first main surface of the semiconductor substrate, a dielectric layer between the semiconductor substrate and the first electrode, a second electrode opposing the second main surface of the semiconductor substrate, and a resistance control layer between the semiconductor substrate and the second electrode. The resistance control layer includes a first region having a first electrical resistivity and electrically connecting the semiconductor substrate and the second electrode, and a second region having a second electrical resistivity higher than the first electrical resistivity of the first region and adjacent to the first region.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS BASIC ELECTRIC ELEMENTS CONTROL OR REGULATION THEREOF CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERATION SEMICONDUCTOR DEVICES |
title | Semiconductor apparatus |
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