Memory wordline isolation for improvement in reliability, availability, and scalability (RAS)

A memory device that performs internal ECC (error checking and correction) can treat an N-bit channel as two N/2-bit channels for application of ECC. The ECC for an N/2-bit channel is simpler than the ECC for N bits, and thus, each N/2-bit portion can be separately correctable when treated as two N/...

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Bibliographische Detailangaben

1. Verfasser:	Bains, Kuljit S
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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