Branch prediction throughput by skipping over cachelines without branches

According to one general aspect, an apparatus may include a branch prediction circuit configured to predict if a branch instruction will be taken or not. The apparatus may include a branch target buffer circuit configured to store a memory segment empty flag that indicates whether or not the memory...

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Bibliographische Detailangaben

Hauptverfasser:	Govindan, Madhu Saravana Sibi, Changwatchai, Wichaya Top, Tkaczyk, Monika, Zou, Fuzhou, Ngo, Anhdung, Zuraski, Jr., Gerald David
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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