System for link management between multiple communication chips
Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected t...
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creator | Sauer, Matthias O'Shea, Helena Deirdre Ramamurthi, Vijay Kumar Paycher, Alon Chen, Camille Adler, Bernd W |
description | Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11176069B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11176069B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11176069B23</originalsourceid><addsrcrecordid>eNrjZLAPriwuSc1VSMsvUsjJzMtWyE3MS0xPzU3NK1FISi0pT03NU8gtzSnJLMhJVUjOz80tzctMTizJzM9TSM7ILCjmYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGhobmZgZmlk5GxsSoAQDWNjGy</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System for link management between multiple communication chips</title><source>esp@cenet</source><creator>Sauer, Matthias ; O'Shea, Helena Deirdre ; Ramamurthi, Vijay Kumar ; Paycher, Alon ; Chen, Camille ; Adler, Bernd W</creator><creatorcontrib>Sauer, Matthias ; O'Shea, Helena Deirdre ; Ramamurthi, Vijay Kumar ; Paycher, Alon ; Chen, Camille ; Adler, Bernd W</creatorcontrib><description>Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20211116&DB=EPODOC&CC=US&NR=11176069B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20211116&DB=EPODOC&CC=US&NR=11176069B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Sauer, Matthias</creatorcontrib><creatorcontrib>O'Shea, Helena Deirdre</creatorcontrib><creatorcontrib>Ramamurthi, Vijay Kumar</creatorcontrib><creatorcontrib>Paycher, Alon</creatorcontrib><creatorcontrib>Chen, Camille</creatorcontrib><creatorcontrib>Adler, Bernd W</creatorcontrib><title>System for link management between multiple communication chips</title><description>Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAPriwuSc1VSMsvUsjJzMtWyE3MS0xPzU3NK1FISi0pT03NU8gtzSnJLMhJVUjOz80tzctMTizJzM9TSM7ILCjmYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGhobmZgZmlk5GxsSoAQDWNjGy</recordid><startdate>20211116</startdate><enddate>20211116</enddate><creator>Sauer, Matthias</creator><creator>O'Shea, Helena Deirdre</creator><creator>Ramamurthi, Vijay Kumar</creator><creator>Paycher, Alon</creator><creator>Chen, Camille</creator><creator>Adler, Bernd W</creator><scope>EVB</scope></search><sort><creationdate>20211116</creationdate><title>System for link management between multiple communication chips</title><author>Sauer, Matthias ; O'Shea, Helena Deirdre ; Ramamurthi, Vijay Kumar ; Paycher, Alon ; Chen, Camille ; Adler, Bernd W</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11176069B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Sauer, Matthias</creatorcontrib><creatorcontrib>O'Shea, Helena Deirdre</creatorcontrib><creatorcontrib>Ramamurthi, Vijay Kumar</creatorcontrib><creatorcontrib>Paycher, Alon</creatorcontrib><creatorcontrib>Chen, Camille</creatorcontrib><creatorcontrib>Adler, Bernd W</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sauer, Matthias</au><au>O'Shea, Helena Deirdre</au><au>Ramamurthi, Vijay Kumar</au><au>Paycher, Alon</au><au>Chen, Camille</au><au>Adler, Bernd W</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System for link management between multiple communication chips</title><date>2021-11-16</date><risdate>2021</risdate><abstract>Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | System for link management between multiple communication chips |
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