Data storage system with physical storage and cache memory

A data storage system comprises physical storage, cache memory and a processor connected to the physical storage and the cache memory. The processor is arranged to maintain a set of active regions in the cache memory, each active region having a size equal to an integer multiple of an update size of...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Sanders, Lee J, Scales, William J, Sasson, Ben, Hutchison, Gordon D, Mulholland, Miles
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Sanders, Lee J
Scales, William J
Sasson, Ben
Hutchison, Gordon D
Mulholland, Miles
description A data storage system comprises physical storage, cache memory and a processor connected to the physical storage and the cache memory. The processor is arranged to maintain a set of active regions in the cache memory, each active region having a size equal to an integer multiple of an update size of a flash chip within the physical storage, where the integer could be 1. The processor receives requests for one or more blocks of the cache memory from components within the storage system and allocates one or more blocks from an active region in response to a received request. If the processor determines that all blocks in an active region have been allocated and that all allocated blocks within this region have been written to, then the processor destages the content of this region to the physical storage.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11176047B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11176047B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11176047B23</originalsourceid><addsrcrecordid>eNrjZLBySSxJVCguyS9KTE9VKK4sLknNVSjPLMlQKMioLM5MTsyBSybmpSgkJyZnpCrkpubmF1XyMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDQ0NzMwMTcycjY2LUAAB6oC8t</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Data storage system with physical storage and cache memory</title><source>esp@cenet</source><creator>Sanders, Lee J ; Scales, William J ; Sasson, Ben ; Hutchison, Gordon D ; Mulholland, Miles</creator><creatorcontrib>Sanders, Lee J ; Scales, William J ; Sasson, Ben ; Hutchison, Gordon D ; Mulholland, Miles</creatorcontrib><description>A data storage system comprises physical storage, cache memory and a processor connected to the physical storage and the cache memory. The processor is arranged to maintain a set of active regions in the cache memory, each active region having a size equal to an integer multiple of an update size of a flash chip within the physical storage, where the integer could be 1. The processor receives requests for one or more blocks of the cache memory from components within the storage system and allocates one or more blocks from an active region in response to a received request. If the processor determines that all blocks in an active region have been allocated and that all allocated blocks within this region have been written to, then the processor destages the content of this region to the physical storage.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20211116&amp;DB=EPODOC&amp;CC=US&amp;NR=11176047B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20211116&amp;DB=EPODOC&amp;CC=US&amp;NR=11176047B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Sanders, Lee J</creatorcontrib><creatorcontrib>Scales, William J</creatorcontrib><creatorcontrib>Sasson, Ben</creatorcontrib><creatorcontrib>Hutchison, Gordon D</creatorcontrib><creatorcontrib>Mulholland, Miles</creatorcontrib><title>Data storage system with physical storage and cache memory</title><description>A data storage system comprises physical storage, cache memory and a processor connected to the physical storage and the cache memory. The processor is arranged to maintain a set of active regions in the cache memory, each active region having a size equal to an integer multiple of an update size of a flash chip within the physical storage, where the integer could be 1. The processor receives requests for one or more blocks of the cache memory from components within the storage system and allocates one or more blocks from an active region in response to a received request. If the processor determines that all blocks in an active region have been allocated and that all allocated blocks within this region have been written to, then the processor destages the content of this region to the physical storage.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLBySSxJVCguyS9KTE9VKK4sLknNVSjPLMlQKMioLM5MTsyBSybmpSgkJyZnpCrkpubmF1XyMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDQ0NzMwMTcycjY2LUAAB6oC8t</recordid><startdate>20211116</startdate><enddate>20211116</enddate><creator>Sanders, Lee J</creator><creator>Scales, William J</creator><creator>Sasson, Ben</creator><creator>Hutchison, Gordon D</creator><creator>Mulholland, Miles</creator><scope>EVB</scope></search><sort><creationdate>20211116</creationdate><title>Data storage system with physical storage and cache memory</title><author>Sanders, Lee J ; Scales, William J ; Sasson, Ben ; Hutchison, Gordon D ; Mulholland, Miles</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11176047B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Sanders, Lee J</creatorcontrib><creatorcontrib>Scales, William J</creatorcontrib><creatorcontrib>Sasson, Ben</creatorcontrib><creatorcontrib>Hutchison, Gordon D</creatorcontrib><creatorcontrib>Mulholland, Miles</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sanders, Lee J</au><au>Scales, William J</au><au>Sasson, Ben</au><au>Hutchison, Gordon D</au><au>Mulholland, Miles</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Data storage system with physical storage and cache memory</title><date>2021-11-16</date><risdate>2021</risdate><abstract>A data storage system comprises physical storage, cache memory and a processor connected to the physical storage and the cache memory. The processor is arranged to maintain a set of active regions in the cache memory, each active region having a size equal to an integer multiple of an update size of a flash chip within the physical storage, where the integer could be 1. The processor receives requests for one or more blocks of the cache memory from components within the storage system and allocates one or more blocks from an active region in response to a received request. If the processor determines that all blocks in an active region have been allocated and that all allocated blocks within this region have been written to, then the processor destages the content of this region to the physical storage.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US11176047B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Data storage system with physical storage and cache memory
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T23%3A21%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Sanders,%20Lee%20J&rft.date=2021-11-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11176047B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true