3D NAND memory device and method of forming the same
In a memory device, a lower memory cell string is formed over a substrate to include a first channel structure, a plurality of first word line layers and first insulating layers. The first channel structure protrudes from the substrate and passes through the first word line layers and first insulati...
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creator | Wang, Enbo Zhang, Ruo Fang Yang, Haohao Xu, Qianbing Zhang, Fushan Hu, Yushi |
description | In a memory device, a lower memory cell string is formed over a substrate to include a first channel structure, a plurality of first word line layers and first insulating layers. The first channel structure protrudes from the substrate and passes through the first word line layers and first insulating layers. An inter deck contact is formed over the lower memory cell string and connected with the first channel structure. An upper memory cell string is formed over the inter deck contact. The upper memory cell string includes a second channel structure, a plurality of second word lines and second insulating layers. The second channel structure passes through the second word lines and second insulating layers, and extends to the inter deck contact, and further extends laterally into the second insulating layers. A channel dielectric region of the second channel structure is above the inter deck contact. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11145667B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11145667B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11145667B23</originalsourceid><addsrcrecordid>eNrjZDAxdlHwc_RzUchNzc0vqlRISS3LTE5VSMxLAYqUZOSnKOSnKaTlF-Vm5qUrlGSkKhQn5qbyMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDQ0MTUzMzcycjY2LUAABznCtw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>3D NAND memory device and method of forming the same</title><source>esp@cenet</source><creator>Wang, Enbo ; Zhang, Ruo Fang ; Yang, Haohao ; Xu, Qianbing ; Zhang, Fushan ; Hu, Yushi</creator><creatorcontrib>Wang, Enbo ; Zhang, Ruo Fang ; Yang, Haohao ; Xu, Qianbing ; Zhang, Fushan ; Hu, Yushi</creatorcontrib><description>In a memory device, a lower memory cell string is formed over a substrate to include a first channel structure, a plurality of first word line layers and first insulating layers. The first channel structure protrudes from the substrate and passes through the first word line layers and first insulating layers. An inter deck contact is formed over the lower memory cell string and connected with the first channel structure. An upper memory cell string is formed over the inter deck contact. The upper memory cell string includes a second channel structure, a plurality of second word lines and second insulating layers. The second channel structure passes through the second word lines and second insulating layers, and extends to the inter deck contact, and further extends laterally into the second insulating layers. A channel dielectric region of the second channel structure is above the inter deck contact.</description><language>eng</language><subject>ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20211012&DB=EPODOC&CC=US&NR=11145667B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20211012&DB=EPODOC&CC=US&NR=11145667B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Wang, Enbo</creatorcontrib><creatorcontrib>Zhang, Ruo Fang</creatorcontrib><creatorcontrib>Yang, Haohao</creatorcontrib><creatorcontrib>Xu, Qianbing</creatorcontrib><creatorcontrib>Zhang, Fushan</creatorcontrib><creatorcontrib>Hu, Yushi</creatorcontrib><title>3D NAND memory device and method of forming the same</title><description>In a memory device, a lower memory cell string is formed over a substrate to include a first channel structure, a plurality of first word line layers and first insulating layers. The first channel structure protrudes from the substrate and passes through the first word line layers and first insulating layers. An inter deck contact is formed over the lower memory cell string and connected with the first channel structure. An upper memory cell string is formed over the inter deck contact. The upper memory cell string includes a second channel structure, a plurality of second word lines and second insulating layers. The second channel structure passes through the second word lines and second insulating layers, and extends to the inter deck contact, and further extends laterally into the second insulating layers. A channel dielectric region of the second channel structure is above the inter deck contact.</description><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAxdlHwc_RzUchNzc0vqlRISS3LTE5VSMxLAYqUZOSnKOSnKaTlF-Vm5qUrlGSkKhQn5qbyMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JL40GBDQ0MTUzMzcycjY2LUAABznCtw</recordid><startdate>20211012</startdate><enddate>20211012</enddate><creator>Wang, Enbo</creator><creator>Zhang, Ruo Fang</creator><creator>Yang, Haohao</creator><creator>Xu, Qianbing</creator><creator>Zhang, Fushan</creator><creator>Hu, Yushi</creator><scope>EVB</scope></search><sort><creationdate>20211012</creationdate><title>3D NAND memory device and method of forming the same</title><author>Wang, Enbo ; Zhang, Ruo Fang ; Yang, Haohao ; Xu, Qianbing ; Zhang, Fushan ; Hu, Yushi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11145667B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Wang, Enbo</creatorcontrib><creatorcontrib>Zhang, Ruo Fang</creatorcontrib><creatorcontrib>Yang, Haohao</creatorcontrib><creatorcontrib>Xu, Qianbing</creatorcontrib><creatorcontrib>Zhang, Fushan</creatorcontrib><creatorcontrib>Hu, Yushi</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Wang, Enbo</au><au>Zhang, Ruo Fang</au><au>Yang, Haohao</au><au>Xu, Qianbing</au><au>Zhang, Fushan</au><au>Hu, Yushi</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>3D NAND memory device and method of forming the same</title><date>2021-10-12</date><risdate>2021</risdate><abstract>In a memory device, a lower memory cell string is formed over a substrate to include a first channel structure, a plurality of first word line layers and first insulating layers. The first channel structure protrudes from the substrate and passes through the first word line layers and first insulating layers. An inter deck contact is formed over the lower memory cell string and connected with the first channel structure. An upper memory cell string is formed over the inter deck contact. The upper memory cell string includes a second channel structure, a plurality of second word lines and second insulating layers. The second channel structure passes through the second word lines and second insulating layers, and extends to the inter deck contact, and further extends laterally into the second insulating layers. A channel dielectric region of the second channel structure is above the inter deck contact.</abstract><oa>free_for_read</oa></addata></record> |
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title | 3D NAND memory device and method of forming the same |
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