Memory management apparatus and method for managing different page tables for different privilege levels

An apparatus and method for managing different page tables for different privilege levels. For example, one embodiment of a processor comprises: a first control register to store a first base address associated with program code executed at a first privilege level; a second control register to store...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Chappell, Robert S, Rodgers, Scott Dion, Huntley, Barry E
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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