Providing dynamic selection of cache coherence protocols in processor-based devices

Providing dynamic selection of cache coherence protocols in processor-based devices is disclosed. In this regard, a processor-based device includes a master PE and at least one snooper PE, as well as a central ordering point (COP). The COP dynamically selects, on a store-by-store basis, either a wri...

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Bibliographische Detailangaben

Hauptverfasser:	Magill, Kevin Neal, Robinson, Eric Francis, Panavich, Jason, Bachand, Derek, Mitchell, Michael B, Wilson, Michael P
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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