Integrated circuit device with electrostatic discharge (ESD) protection

Disclosed herein are integrated circuit devices and methods for fabricating the same that include at least one non-I/O die having ESD protection circuitry. The ESD protection circuitry disclosed herein may also be utilized in I/O dies. In one example, an integrated circuit device includes a die havi...

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creator Karp, James
description Disclosed herein are integrated circuit devices and methods for fabricating the same that include at least one non-I/O die having ESD protection circuitry. The ESD protection circuitry disclosed herein may also be utilized in I/O dies. In one example, an integrated circuit device includes a die having a first body. First and second contact pads are exposed to a surface of the first body. The first contact pad is configured to connect to a first supply voltage. The second contact pad is configured to connect to a second supply voltage or ground. A first charge-sensitive circuitry formed in the first body is coupled between the first and second contact pads. A first RC clamp formed in the first body is coupled between the first and second contact pads. The first RC clamp includes at least two BigFETs coupled between the first and second contact pads, and a trigger circuitry coupled in parallel to gate terminals of the at least two BigFETs.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11114429B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11114429B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11114429B23</originalsourceid><addsrcrecordid>eNqNijsOwjAQBd1QIOAOSwcFBSENLUn41IE6staPZKXItuwFrk8KDsA0U8zMzeXmFX2yCkcsiV-i5PAWBn1EB8II1hSyWhUmJ5kHm3rQpmnrLcUUdOoS_NLMnnbMWP28MOtzc6-uO8TQIUfL8NDu0e4nyrI4norDP88Xaakz6g</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Integrated circuit device with electrostatic discharge (ESD) protection</title><source>esp@cenet</source><creator>Karp, James</creator><creatorcontrib>Karp, James</creatorcontrib><description>Disclosed herein are integrated circuit devices and methods for fabricating the same that include at least one non-I/O die having ESD protection circuitry. The ESD protection circuitry disclosed herein may also be utilized in I/O dies. In one example, an integrated circuit device includes a die having a first body. First and second contact pads are exposed to a surface of the first body. The first contact pad is configured to connect to a first supply voltage. The second contact pad is configured to connect to a second supply voltage or ground. A first charge-sensitive circuitry formed in the first body is coupled between the first and second contact pads. A first RC clamp formed in the first body is coupled between the first and second contact pads. The first RC clamp includes at least two BigFETs coupled between the first and second contact pads, and a trigger circuitry coupled in parallel to gate terminals of the at least two BigFETs.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210907&amp;DB=EPODOC&amp;CC=US&amp;NR=11114429B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,782,887,25573,76557</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210907&amp;DB=EPODOC&amp;CC=US&amp;NR=11114429B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Karp, James</creatorcontrib><title>Integrated circuit device with electrostatic discharge (ESD) protection</title><description>Disclosed herein are integrated circuit devices and methods for fabricating the same that include at least one non-I/O die having ESD protection circuitry. The ESD protection circuitry disclosed herein may also be utilized in I/O dies. In one example, an integrated circuit device includes a die having a first body. First and second contact pads are exposed to a surface of the first body. The first contact pad is configured to connect to a first supply voltage. The second contact pad is configured to connect to a second supply voltage or ground. A first charge-sensitive circuitry formed in the first body is coupled between the first and second contact pads. A first RC clamp formed in the first body is coupled between the first and second contact pads. The first RC clamp includes at least two BigFETs coupled between the first and second contact pads, and a trigger circuitry coupled in parallel to gate terminals of the at least two BigFETs.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNijsOwjAQBd1QIOAOSwcFBSENLUn41IE6staPZKXItuwFrk8KDsA0U8zMzeXmFX2yCkcsiV-i5PAWBn1EB8II1hSyWhUmJ5kHm3rQpmnrLcUUdOoS_NLMnnbMWP28MOtzc6-uO8TQIUfL8NDu0e4nyrI4norDP88Xaakz6g</recordid><startdate>20210907</startdate><enddate>20210907</enddate><creator>Karp, James</creator><scope>EVB</scope></search><sort><creationdate>20210907</creationdate><title>Integrated circuit device with electrostatic discharge (ESD) protection</title><author>Karp, James</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11114429B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Karp, James</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Karp, James</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Integrated circuit device with electrostatic discharge (ESD) protection</title><date>2021-09-07</date><risdate>2021</risdate><abstract>Disclosed herein are integrated circuit devices and methods for fabricating the same that include at least one non-I/O die having ESD protection circuitry. The ESD protection circuitry disclosed herein may also be utilized in I/O dies. In one example, an integrated circuit device includes a die having a first body. First and second contact pads are exposed to a surface of the first body. The first contact pad is configured to connect to a first supply voltage. The second contact pad is configured to connect to a second supply voltage or ground. A first charge-sensitive circuitry formed in the first body is coupled between the first and second contact pads. A first RC clamp formed in the first body is coupled between the first and second contact pads. The first RC clamp includes at least two BigFETs coupled between the first and second contact pads, and a trigger circuitry coupled in parallel to gate terminals of the at least two BigFETs.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Integrated circuit device with electrostatic discharge (ESD) protection
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-02T20%3A43%3A10IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Karp,%20James&rft.date=2021-09-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS11114429B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true