Device isolator with reduced parasitic capacitance

Isolator structures for an integrated circuit with reduced effective parasitic capacitance. Disclosed embodiments include an isolator structure with parallel conductive elements forming a capacitor or inductive transformer, overlying a semiconductor structure including a well region of a first condu...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Arch, John Kenneth, Kamath, Anant Shankar, Bonifield, Thomas D, Selvaraj, Raja, Williams, Byron Lovell
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES TRANSMISSION
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