Generating integrated circuit floorplans using neural networks

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each tim...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Babu, Anand, Hang, William, Yazgan, Mustafa Nazim, Ho, Chian-min Richard, Wang, Ya, Goldie, Anna Darling, Tuncer, Emre, Dean, Jeffrey Adgate, Mirhoseini, Azalia
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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