Host-convertible secure enclaves in memory that leverage multi-key total memory encryption with integrity

A processor includes a cryptographic engine to control access, using an secure region key identifier (ID), to one or more memory range of memory allocable for flexible conversion to secure pages of architecturally-protected memory regions, and a processor core. The processor core is to, responsive t...

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Bibliographische Detailangaben

Hauptverfasser:	Rozas, Carlos V, Johnson, Simon P, Ozsoy, Meltem, Chhabra, Siddhartha, McKeen, Francis X, Alexandrovich, Ilya, Makaram, Raghunandan, Zmudzinski, Krystof C
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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