Metallization in integrated circuit structures

Disclosed herein are structures, methods, and assemblies related to metallization in integrated circuit (IC) structures. For example, in some embodiments, an IC structure may include a first nanowire in a metal region and a second nanowire in the metal region. A distance between the first nanowire a...

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Hauptverfasser: O'Brien, Daniel B, Baumgartel, Lukas M, Crum, Dax M, Golonzka, Oleg, Bergstrom, Daniel B, Wiegand, Christopher J, Lavric, Dan S, Leib, Jeffrey S, Duffy, Timothy Michael
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creator O'Brien, Daniel B
Baumgartel, Lukas M
Crum, Dax M
Golonzka, Oleg
Bergstrom, Daniel B
Wiegand, Christopher J
Lavric, Dan S
Leib, Jeffrey S
Duffy, Timothy Michael
description Disclosed herein are structures, methods, and assemblies related to metallization in integrated circuit (IC) structures. For example, in some embodiments, an IC structure may include a first nanowire in a metal region and a second nanowire in the metal region. A distance between the first nanowire and the second nanowire may be less than 5 nanometers, and the metal region may include tungsten between the first nanowire and the second nanowire.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US11018222B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US11018222B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US11018222B13</originalsourceid><addsrcrecordid>eNrjZNDzTS1JzMnJrEosyczPU8gEoZLU9KLEktQUheTMouTSzBKF4pKi0uSS0qLUYh4G1rTEnOJUXijNzaDo5hri7KGbWpAfn1pckJicmpdaEh8abGhoYGhhZGTkZGhMjBoAS2QrWw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Metallization in integrated circuit structures</title><source>esp@cenet</source><creator>O'Brien, Daniel B ; Baumgartel, Lukas M ; Crum, Dax M ; Golonzka, Oleg ; Bergstrom, Daniel B ; Wiegand, Christopher J ; Lavric, Dan S ; Leib, Jeffrey S ; Duffy, Timothy Michael</creator><creatorcontrib>O'Brien, Daniel B ; Baumgartel, Lukas M ; Crum, Dax M ; Golonzka, Oleg ; Bergstrom, Daniel B ; Wiegand, Christopher J ; Lavric, Dan S ; Leib, Jeffrey S ; Duffy, Timothy Michael</creatorcontrib><description>Disclosed herein are structures, methods, and assemblies related to metallization in integrated circuit (IC) structures. For example, in some embodiments, an IC structure may include a first nanowire in a metal region and a second nanowire in the metal region. A distance between the first nanowire and the second nanowire may be less than 5 nanometers, and the metal region may include tungsten between the first nanowire and the second nanowire.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OR TREATMENT THEREOF ; NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS,MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES ASDISCRETE UNITS ; NANOTECHNOLOGY ; PERFORMING OPERATIONS ; SEMICONDUCTOR DEVICES ; TRANSPORTING</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210525&amp;DB=EPODOC&amp;CC=US&amp;NR=11018222B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210525&amp;DB=EPODOC&amp;CC=US&amp;NR=11018222B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>O'Brien, Daniel B</creatorcontrib><creatorcontrib>Baumgartel, Lukas M</creatorcontrib><creatorcontrib>Crum, Dax M</creatorcontrib><creatorcontrib>Golonzka, Oleg</creatorcontrib><creatorcontrib>Bergstrom, Daniel B</creatorcontrib><creatorcontrib>Wiegand, Christopher J</creatorcontrib><creatorcontrib>Lavric, Dan S</creatorcontrib><creatorcontrib>Leib, Jeffrey S</creatorcontrib><creatorcontrib>Duffy, Timothy Michael</creatorcontrib><title>Metallization in integrated circuit structures</title><description>Disclosed herein are structures, methods, and assemblies related to metallization in integrated circuit (IC) structures. For example, in some embodiments, an IC structure may include a first nanowire in a metal region and a second nanowire in the metal region. A distance between the first nanowire and the second nanowire may be less than 5 nanometers, and the metal region may include tungsten between the first nanowire and the second nanowire.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OR TREATMENT THEREOF</subject><subject>NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS,MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES ASDISCRETE UNITS</subject><subject>NANOTECHNOLOGY</subject><subject>PERFORMING OPERATIONS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TRANSPORTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNDzTS1JzMnJrEosyczPU8gEoZLU9KLEktQUheTMouTSzBKF4pKi0uSS0qLUYh4G1rTEnOJUXijNzaDo5hri7KGbWpAfn1pckJicmpdaEh8abGhoYGhhZGTkZGhMjBoAS2QrWw</recordid><startdate>20210525</startdate><enddate>20210525</enddate><creator>O'Brien, Daniel B</creator><creator>Baumgartel, Lukas M</creator><creator>Crum, Dax M</creator><creator>Golonzka, Oleg</creator><creator>Bergstrom, Daniel B</creator><creator>Wiegand, Christopher J</creator><creator>Lavric, Dan S</creator><creator>Leib, Jeffrey S</creator><creator>Duffy, Timothy Michael</creator><scope>EVB</scope></search><sort><creationdate>20210525</creationdate><title>Metallization in integrated circuit structures</title><author>O'Brien, Daniel B ; Baumgartel, Lukas M ; Crum, Dax M ; Golonzka, Oleg ; Bergstrom, Daniel B ; Wiegand, Christopher J ; Lavric, Dan S ; Leib, Jeffrey S ; Duffy, Timothy Michael</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US11018222B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OR TREATMENT THEREOF</topic><topic>NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS,MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES ASDISCRETE UNITS</topic><topic>NANOTECHNOLOGY</topic><topic>PERFORMING OPERATIONS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TRANSPORTING</topic><toplevel>online_resources</toplevel><creatorcontrib>O'Brien, Daniel B</creatorcontrib><creatorcontrib>Baumgartel, Lukas M</creatorcontrib><creatorcontrib>Crum, Dax M</creatorcontrib><creatorcontrib>Golonzka, Oleg</creatorcontrib><creatorcontrib>Bergstrom, Daniel B</creatorcontrib><creatorcontrib>Wiegand, Christopher J</creatorcontrib><creatorcontrib>Lavric, Dan S</creatorcontrib><creatorcontrib>Leib, Jeffrey S</creatorcontrib><creatorcontrib>Duffy, Timothy Michael</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>O'Brien, Daniel B</au><au>Baumgartel, Lukas M</au><au>Crum, Dax M</au><au>Golonzka, Oleg</au><au>Bergstrom, Daniel B</au><au>Wiegand, Christopher J</au><au>Lavric, Dan S</au><au>Leib, Jeffrey S</au><au>Duffy, Timothy Michael</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Metallization in integrated circuit structures</title><date>2021-05-25</date><risdate>2021</risdate><abstract>Disclosed herein are structures, methods, and assemblies related to metallization in integrated circuit (IC) structures. For example, in some embodiments, an IC structure may include a first nanowire in a metal region and a second nanowire in the metal region. A distance between the first nanowire and the second nanowire may be less than 5 nanometers, and the metal region may include tungsten between the first nanowire and the second nanowire.</abstract><oa>free_for_read</oa></addata></record>
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source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OR TREATMENT THEREOF
NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS,MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES ASDISCRETE UNITS
NANOTECHNOLOGY
PERFORMING OPERATIONS
SEMICONDUCTOR DEVICES
TRANSPORTING
title Metallization in integrated circuit structures
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