Low-k feature formation processes and structures formed thereby
Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. S...
Gespeichert in:
| Hauptverfasser: | , , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Cheng, Te-En Kao, Wan-Yi Tu, Guan-Yao Te, Li Chun Lin, Hsiang-Wei Ko, Chung-Chi Lin, Wei-Ken Liao, Shu Ling |
| description | Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10950431B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10950431B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10950431B23</originalsourceid><addsrcrecordid>eNrjZLD3yS_XzVZIS00sKS1KVUjLL8pNLMnMz1MoKMpPTi0uTi1WSMxLUSguKSpNBqkoBitJTVEoyUgtSk2q5GFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8aHBhgaWpgYmxoZORsbEqAEAx94xiw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Low-k feature formation processes and structures formed thereby</title><source>esp@cenet</source><creator>Cheng, Te-En ; Kao, Wan-Yi ; Tu, Guan-Yao ; Te, Li Chun ; Lin, Hsiang-Wei ; Ko, Chung-Chi ; Lin, Wei-Ken ; Liao, Shu Ling</creator><creatorcontrib>Cheng, Te-En ; Kao, Wan-Yi ; Tu, Guan-Yao ; Te, Li Chun ; Lin, Hsiang-Wei ; Ko, Chung-Chi ; Lin, Wei-Ken ; Liao, Shu Ling</creatorcontrib><description>Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210316&DB=EPODOC&CC=US&NR=10950431B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210316&DB=EPODOC&CC=US&NR=10950431B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Cheng, Te-En</creatorcontrib><creatorcontrib>Kao, Wan-Yi</creatorcontrib><creatorcontrib>Tu, Guan-Yao</creatorcontrib><creatorcontrib>Te, Li Chun</creatorcontrib><creatorcontrib>Lin, Hsiang-Wei</creatorcontrib><creatorcontrib>Ko, Chung-Chi</creatorcontrib><creatorcontrib>Lin, Wei-Ken</creatorcontrib><creatorcontrib>Liao, Shu Ling</creatorcontrib><title>Low-k feature formation processes and structures formed thereby</title><description>Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLD3yS_XzVZIS00sKS1KVUjLL8pNLMnMz1MoKMpPTi0uTi1WSMxLUSguKSpNBqkoBitJTVEoyUgtSk2q5GFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8aHBhgaWpgYmxoZORsbEqAEAx94xiw</recordid><startdate>20210316</startdate><enddate>20210316</enddate><creator>Cheng, Te-En</creator><creator>Kao, Wan-Yi</creator><creator>Tu, Guan-Yao</creator><creator>Te, Li Chun</creator><creator>Lin, Hsiang-Wei</creator><creator>Ko, Chung-Chi</creator><creator>Lin, Wei-Ken</creator><creator>Liao, Shu Ling</creator><scope>EVB</scope></search><sort><creationdate>20210316</creationdate><title>Low-k feature formation processes and structures formed thereby</title><author>Cheng, Te-En ; Kao, Wan-Yi ; Tu, Guan-Yao ; Te, Li Chun ; Lin, Hsiang-Wei ; Ko, Chung-Chi ; Lin, Wei-Ken ; Liao, Shu Ling</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10950431B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Cheng, Te-En</creatorcontrib><creatorcontrib>Kao, Wan-Yi</creatorcontrib><creatorcontrib>Tu, Guan-Yao</creatorcontrib><creatorcontrib>Te, Li Chun</creatorcontrib><creatorcontrib>Lin, Hsiang-Wei</creatorcontrib><creatorcontrib>Ko, Chung-Chi</creatorcontrib><creatorcontrib>Lin, Wei-Ken</creatorcontrib><creatorcontrib>Liao, Shu Ling</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Cheng, Te-En</au><au>Kao, Wan-Yi</au><au>Tu, Guan-Yao</au><au>Te, Li Chun</au><au>Lin, Hsiang-Wei</au><au>Ko, Chung-Chi</au><au>Lin, Wei-Ken</au><au>Liao, Shu Ling</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Low-k feature formation processes and structures formed thereby</title><date>2021-03-16</date><risdate>2021</risdate><abstract>Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US10950431B2 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Low-k feature formation processes and structures formed thereby |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T05%3A51%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Cheng,%20Te-En&rft.date=2021-03-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10950431B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |