Method of fabricating a plurality of linear arrays with submicron y-axis alignment

A method of assembling a plurality of linear arrays from a silicon wafer having a first surface and a second surface opposite the first surface, the first surface having at least a first linear array of sensor/emitter elements and a second linear array of sensor/emitter elements, each arranged paral...

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Bibliographische Detailangaben
Hauptverfasser: Redding, Gary D, Casey, Joseph F
Format: Patent
Sprache:eng
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