Contact pads for electronic substrates and related methods

Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Orlowski, John August, Morris, Thomas Scott, Jandzinski, David
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Orlowski, John August
Morris, Thomas Scott
Jandzinski, David
description Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10905007B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10905007B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10905007B13</originalsourceid><addsrcrecordid>eNrjZLByzs8rSUwuUShITClWSMsvUkjNSU0uKcrPy0xWKC5NKi4pSixJLVZIzEtRKErNAbJTFHJTSzLyU4p5GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakl8aLChgaWBqYGBuZOhMTFqAI6bL1o</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Contact pads for electronic substrates and related methods</title><source>esp@cenet</source><creator>Orlowski, John August ; Morris, Thomas Scott ; Jandzinski, David</creator><creatorcontrib>Orlowski, John August ; Morris, Thomas Scott ; Jandzinski, David</creatorcontrib><description>Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers.</description><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210126&amp;DB=EPODOC&amp;CC=US&amp;NR=10905007B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210126&amp;DB=EPODOC&amp;CC=US&amp;NR=10905007B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Orlowski, John August</creatorcontrib><creatorcontrib>Morris, Thomas Scott</creatorcontrib><creatorcontrib>Jandzinski, David</creatorcontrib><title>Contact pads for electronic substrates and related methods</title><description>Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLByzs8rSUwuUShITClWSMsvUkjNSU0uKcrPy0xWKC5NKi4pSixJLVZIzEtRKErNAbJTFHJTSzLyU4p5GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakl8aLChgaWBqYGBuZOhMTFqAI6bL1o</recordid><startdate>20210126</startdate><enddate>20210126</enddate><creator>Orlowski, John August</creator><creator>Morris, Thomas Scott</creator><creator>Jandzinski, David</creator><scope>EVB</scope></search><sort><creationdate>20210126</creationdate><title>Contact pads for electronic substrates and related methods</title><author>Orlowski, John August ; Morris, Thomas Scott ; Jandzinski, David</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10905007B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>Orlowski, John August</creatorcontrib><creatorcontrib>Morris, Thomas Scott</creatorcontrib><creatorcontrib>Jandzinski, David</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Orlowski, John August</au><au>Morris, Thomas Scott</au><au>Jandzinski, David</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Contact pads for electronic substrates and related methods</title><date>2021-01-26</date><risdate>2021</risdate><abstract>Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US10905007B1
source esp@cenet
subjects CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
title Contact pads for electronic substrates and related methods
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T02%3A43%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Orlowski,%20John%20August&rft.date=2021-01-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10905007B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true