Fabric die to fabric die interconnect for modularized integrated circuit devices

The presently disclosed programmable fabric die includes a direct fabric die-to-fabric die interconnect interface column disposed in a sector of programmable logic fabric. Each row of the interconnect interface column includes at least one interconnect interface that is electrically coupled to a mic...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Leong, Chee Seng, Lim, Han Wooi, Teh, Chee Hak, Phoon, Hee Kong, Tang, Lai Guan
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Leong, Chee Seng
Lim, Han Wooi
Teh, Chee Hak
Phoon, Hee Kong
Tang, Lai Guan
description The presently disclosed programmable fabric die includes a direct fabric die-to-fabric die interconnect interface column disposed in a sector of programmable logic fabric. Each row of the interconnect interface column includes at least one interconnect interface that is electrically coupled to a microbump. The microbump is configured to be electrically coupled to another microbump of another interconnect interface of another fabric die through an interposer. The fabric die may include multiple interconnect interface columns that each extend deep into the sector, enabling low latency connections between the fabric dies and reducing routing congestion. In some embodiments, the fabric die may include interconnect interfaces that are instead distributed throughout logic blocks of the sector.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10886218B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10886218B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10886218B23</originalsourceid><addsrcrecordid>eNrjZAhwS0wqykxWSMlMVSjJV0hD8DLzSlKLkvPz8lKTSxTS8osUcvNTSnMSizKrUlPAkulFiSVAZnJmUXJpZolCSmpZZnJqMQ8Da1piTnEqL5TmZlB0cw1x9tBNLciPTy0uSExOzUstiQ8NNjSwsDAzMrRwMjImRg0AjC83lA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Fabric die to fabric die interconnect for modularized integrated circuit devices</title><source>esp@cenet</source><creator>Leong, Chee Seng ; Lim, Han Wooi ; Teh, Chee Hak ; Phoon, Hee Kong ; Tang, Lai Guan</creator><creatorcontrib>Leong, Chee Seng ; Lim, Han Wooi ; Teh, Chee Hak ; Phoon, Hee Kong ; Tang, Lai Guan</creatorcontrib><description>The presently disclosed programmable fabric die includes a direct fabric die-to-fabric die interconnect interface column disposed in a sector of programmable logic fabric. Each row of the interconnect interface column includes at least one interconnect interface that is electrically coupled to a microbump. The microbump is configured to be electrically coupled to another microbump of another interconnect interface of another fabric die through an interposer. The fabric die may include multiple interconnect interface columns that each extend deep into the sector, enabling low latency connections between the fabric dies and reducing routing congestion. In some embodiments, the fabric die may include interconnect interfaces that are instead distributed throughout logic blocks of the sector.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; PULSE TECHNIQUE ; SEMICONDUCTOR DEVICES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210105&amp;DB=EPODOC&amp;CC=US&amp;NR=10886218B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210105&amp;DB=EPODOC&amp;CC=US&amp;NR=10886218B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Leong, Chee Seng</creatorcontrib><creatorcontrib>Lim, Han Wooi</creatorcontrib><creatorcontrib>Teh, Chee Hak</creatorcontrib><creatorcontrib>Phoon, Hee Kong</creatorcontrib><creatorcontrib>Tang, Lai Guan</creatorcontrib><title>Fabric die to fabric die interconnect for modularized integrated circuit devices</title><description>The presently disclosed programmable fabric die includes a direct fabric die-to-fabric die interconnect interface column disposed in a sector of programmable logic fabric. Each row of the interconnect interface column includes at least one interconnect interface that is electrically coupled to a microbump. The microbump is configured to be electrically coupled to another microbump of another interconnect interface of another fabric die through an interposer. The fabric die may include multiple interconnect interface columns that each extend deep into the sector, enabling low latency connections between the fabric dies and reducing routing congestion. In some embodiments, the fabric die may include interconnect interfaces that are instead distributed throughout logic blocks of the sector.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZAhwS0wqykxWSMlMVSjJV0hD8DLzSlKLkvPz8lKTSxTS8osUcvNTSnMSizKrUlPAkulFiSVAZnJmUXJpZolCSmpZZnJqMQ8Da1piTnEqL5TmZlB0cw1x9tBNLciPTy0uSExOzUstiQ8NNjSwsDAzMrRwMjImRg0AjC83lA</recordid><startdate>20210105</startdate><enddate>20210105</enddate><creator>Leong, Chee Seng</creator><creator>Lim, Han Wooi</creator><creator>Teh, Chee Hak</creator><creator>Phoon, Hee Kong</creator><creator>Tang, Lai Guan</creator><scope>EVB</scope></search><sort><creationdate>20210105</creationdate><title>Fabric die to fabric die interconnect for modularized integrated circuit devices</title><author>Leong, Chee Seng ; Lim, Han Wooi ; Teh, Chee Hak ; Phoon, Hee Kong ; Tang, Lai Guan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10886218B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2021</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Leong, Chee Seng</creatorcontrib><creatorcontrib>Lim, Han Wooi</creatorcontrib><creatorcontrib>Teh, Chee Hak</creatorcontrib><creatorcontrib>Phoon, Hee Kong</creatorcontrib><creatorcontrib>Tang, Lai Guan</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Leong, Chee Seng</au><au>Lim, Han Wooi</au><au>Teh, Chee Hak</au><au>Phoon, Hee Kong</au><au>Tang, Lai Guan</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Fabric die to fabric die interconnect for modularized integrated circuit devices</title><date>2021-01-05</date><risdate>2021</risdate><abstract>The presently disclosed programmable fabric die includes a direct fabric die-to-fabric die interconnect interface column disposed in a sector of programmable logic fabric. Each row of the interconnect interface column includes at least one interconnect interface that is electrically coupled to a microbump. The microbump is configured to be electrically coupled to another microbump of another interconnect interface of another fabric die through an interposer. The fabric die may include multiple interconnect interface columns that each extend deep into the sector, enabling low latency connections between the fabric dies and reducing routing congestion. In some embodiments, the fabric die may include interconnect interfaces that are instead distributed throughout logic blocks of the sector.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US10886218B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
title Fabric die to fabric die interconnect for modularized integrated circuit devices
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T16%3A26%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Leong,%20Chee%20Seng&rft.date=2021-01-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10886218B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true