Pulsed latch system with state retention and method of operation

An integrated circuit includes a pulse generator having at least one delay circuit with an input that receives a clock signal and an output that provides a delayed clock pulse. The delayed clock pulse has a width proportional to an amount of time required to maintain a magnitude of the clock signal....

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Tipple, David Russell, Semenov, Mikhail Yurievich, Jarrar, Anis Mahmoud, Kalashnikov, Viacheslav Sergeyevich
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE
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