Programmable time-division multiplexed comparator

Programmable time-division multiplexed comparator

A monitoring circuit is implemented for comparing a sampled voltage taken from a selected sampling capacitor and a reference voltage from a voltage buffer (150). The voltage buffer (150) is configurable according to programming provided to a programmable logic controller, PLC, (570). Comparisons may...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Hunter, Bradford Lawrence, Murphy, Timothy F
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:A monitoring circuit is implemented for comparing a sampled voltage taken from a selected sampling capacitor and a reference voltage from a voltage buffer (150). The voltage buffer (150) is configurable according to programming provided to a programmable logic controller, PLC, (570). Comparisons may be made on a periodic basis, such as a time-division multiplexed basis, in connection with register settings in the PLC (570).