Error checking for primary signal transmitted between first and second clock domains

An apparatus and method for transmitting signals between two clock domains in which at least one of a phase and a frequency of clock signals in the two clock domains is misaligned. The apparatus includes a first primary interface and a first redundant interface in the first clock domain for receivin...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Tune, Andrew David, Hawkins, David Joseph, Malik, Saira Samar, Geng, Guanghui, Pontes, Julian Jose Hilgemberg
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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