Memory arrays and methods used in forming a memory array

A memory array comprises a vertical stack comprising alternating insulative tiers and wordline tiers. The wordline tiers comprise gate regions of individual memory cells. The gate regions individually comprise part of a wordline in individual of the wordline tiers. Channel material extends elevation...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Howder, Collin, Klein, Rita J
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS
Online-Zugang:	Volltext bestellen
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