Logic cell including deep via contact and wiring layers located at different levels

A semiconductor device includes a substrate; a plurality of conductive areas formed on the substrate at a first vertical level; a first wiring layer formed on the substrate at a second vertical level which is higher than the first vertical level, the first wiring layer including first lines that ext...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Kim, Byung-sung, Park, Chul-hong, Lau, Vincent Chun Fai, Do, Jung-ho
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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