Multi-level memory safety of a sensor integrated circuit
A method for multi-level memory safety for a sensor integrated circuit can include loading a blocking bit into a volatile memory from a non-volatile memory and providing the blocking bit to a gating circuit from the volatile memory. Further, the method may include the gating circuit determining whet...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A method for multi-level memory safety for a sensor integrated circuit can include loading a blocking bit into a volatile memory from a non-volatile memory and providing the blocking bit to a gating circuit from the volatile memory. Further, the method may include the gating circuit determining whether to provide a default value to a functional logic based upon the provided blocking bit. |
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