Memory chip design for manufacturing

Memory chip design for manufacturing

Techniques create a semiconductor layout comprising a resistor structure having a defined baseline sheet resistance. The semiconductor layout includes a resistor marker layer over the resistor structure. A sheet resistance matching estimate is performed to ascertain a difference between the baseline...

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1. Verfasser: Chang, Runzi
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
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creator Chang, Runzi
description Techniques create a semiconductor layout comprising a resistor structure having a defined baseline sheet resistance. The semiconductor layout includes a resistor marker layer over the resistor structure. A sheet resistance matching estimate is performed to ascertain a difference between the baseline sheet resistance and a resultant sheet resistance if the resistor structure were to be manufactured using a manufacturing process. A mask generating algorithm is generated based on the difference effective to achieve a sheet resistance of the resistor structure that is closer to the baseline sheet resistance rather than the resultant sheet resistance. The mask generating algorithm enables one or more masks to be generated to modify the resistor structure relative to the resistor marker layer.
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subjects BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
title Memory chip design for manufacturing
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