Selective recessing to form a fully aligned via

A method of forming a semiconductor device having a vertical metal line interconnect (via) fully aligned to a first direction of a first interconnect layer and a second direction of a second interconnect layer in a selective recess region by forming a plurality of metal lines in a first dielectric l...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Standaert, Theodorus E, Lee, Joe, Huang, Elbert E, Briggs, Benjamin D, Dechene, Jessica
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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