Systems and methods for on-die control of memory command, timing, and/or control signals

A sequencer circuit is configured to generate control signals for on-die memory control circuitry. The control signals may include memory operation pulses for implementing operations on selected non-volatile memory cells embodied within the same die as the sequencer (and other on-die memory control...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Yin, Yibo, Yee, Gordon, Zhang, Yuheng, Liu, Tz-Yi Liu
Format: Patent
Sprache:eng
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