Content addressable memory with match hit quality indication
A logic circuit is provided including at least two input cells and a sense circuit. The input cells are connected to a common result line. Further, the input cells are operable for influencing an electrical quantity at the result line. The sense circuit is connected to the result line, and is adapte...
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creator | Fritsch, Alexander Eckert, Martin |
description | A logic circuit is provided including at least two input cells and a sense circuit. The input cells are connected to a common result line. Further, the input cells are operable for influencing an electrical quantity at the result line. The sense circuit is connected to the result line, and is adapted to output a discrete value out of more than two possible values based on the electrical quantity. |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | Content addressable memory with match hit quality indication |
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