Circuit design analyzer
In some embodiments, a method for processing register transfer level code representing a circuit design can include: determining, by one or more processors based on the register transfer level code, a first group of signal transitions associated with an input net of a component represented in the re...
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| creator | Drasny, Gabor Meil, Gavin B |
| description | In some embodiments, a method for processing register transfer level code representing a circuit design can include: determining, by one or more processors based on the register transfer level code, a first group of signal transitions associated with an input net of a component represented in the register transfer level code, wherein each of the group of signal transitions represents a nondeterministic transition from a first signal state to one or more other signal states; determining, at least one of the processors based on the register transfer level code, that a subgroup of signal transitions of the first group is glitch-free; and determining, by at least one of the processors based on the component represented in the register transfer level code and on the subsequence, an output sequence of signal transitions derived from the glitch-free subgroup. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10599792B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10599792B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10599792B23</originalsourceid><addsrcrecordid>eNrjZBB3zixKLs0sUUhJLc5Mz1NIzEvMqaxKLeJhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYYGppaW5pZGTkbGxKgBANZRIjk</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Circuit design analyzer</title><source>esp@cenet</source><creator>Drasny, Gabor ; Meil, Gavin B</creator><creatorcontrib>Drasny, Gabor ; Meil, Gavin B</creatorcontrib><description>In some embodiments, a method for processing register transfer level code representing a circuit design can include: determining, by one or more processors based on the register transfer level code, a first group of signal transitions associated with an input net of a component represented in the register transfer level code, wherein each of the group of signal transitions represents a nondeterministic transition from a first signal state to one or more other signal states; determining, at least one of the processors based on the register transfer level code, that a subgroup of signal transitions of the first group is glitch-free; and determining, by at least one of the processors based on the component represented in the register transfer level code and on the subsequence, an output sequence of signal transitions derived from the glitch-free subgroup.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200324&DB=EPODOC&CC=US&NR=10599792B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200324&DB=EPODOC&CC=US&NR=10599792B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Drasny, Gabor</creatorcontrib><creatorcontrib>Meil, Gavin B</creatorcontrib><title>Circuit design analyzer</title><description>In some embodiments, a method for processing register transfer level code representing a circuit design can include: determining, by one or more processors based on the register transfer level code, a first group of signal transitions associated with an input net of a component represented in the register transfer level code, wherein each of the group of signal transitions represents a nondeterministic transition from a first signal state to one or more other signal states; determining, at least one of the processors based on the register transfer level code, that a subgroup of signal transitions of the first group is glitch-free; and determining, by at least one of the processors based on the component represented in the register transfer level code and on the subsequence, an output sequence of signal transitions derived from the glitch-free subgroup.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBB3zixKLs0sUUhJLc5Mz1NIzEvMqaxKLeJhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfGhwYYGppaW5pZGTkbGxKgBANZRIjk</recordid><startdate>20200324</startdate><enddate>20200324</enddate><creator>Drasny, Gabor</creator><creator>Meil, Gavin B</creator><scope>EVB</scope></search><sort><creationdate>20200324</creationdate><title>Circuit design analyzer</title><author>Drasny, Gabor ; Meil, Gavin B</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10599792B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Drasny, Gabor</creatorcontrib><creatorcontrib>Meil, Gavin B</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Drasny, Gabor</au><au>Meil, Gavin B</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Circuit design analyzer</title><date>2020-03-24</date><risdate>2020</risdate><abstract>In some embodiments, a method for processing register transfer level code representing a circuit design can include: determining, by one or more processors based on the register transfer level code, a first group of signal transitions associated with an input net of a component represented in the register transfer level code, wherein each of the group of signal transitions represents a nondeterministic transition from a first signal state to one or more other signal states; determining, at least one of the processors based on the register transfer level code, that a subgroup of signal transitions of the first group is glitch-free; and determining, by at least one of the processors based on the component represented in the register transfer level code and on the subsequence, an output sequence of signal transitions derived from the glitch-free subgroup.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Circuit design analyzer |
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