Systems and methods for addressing a cache with split-indexes

Cache memory mapping techniques are presented. A cache may contain an index configuration register. The register may configure the locations of an upper index portion and a lower index portion of a memory address. The portions may be combined to create a combined index. The configurable split-index...

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Bibliographische Detailangaben
1. Verfasser: Richmond, Richard
Format: Patent
Sprache:eng
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