Memory element graph-based placement in integrated circuit design

A system and method to perform physical synthesis to transition a logic design to a physical layout of an integrated circuit include obtaining an initial netlist that indicates all components of the integrated circuit including memory elements and edges that interconnect the components. The method a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Villarrubia, Paul G, Mets, Arjen Alexander, Nam, Gi-Joon, Reddy, Lakshmi N, Trombley, Benjamin, Kim, Myung-Chul, Ramji, Shyam, Suess, Alexander J
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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