Systems and methods for in-field core failover

A multicore processor may include multiple processing cores that were previously designated as active cores and at least one processing core that was previously designated as a functional spare. The processor may include an interface to receive, during operation of the processor in an end-user envir...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Riedlinger, Reid J, DeHaemer, Eric J, Biswas, Arijit, Steiner, Ian M
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Riedlinger, Reid J
DeHaemer, Eric J
Biswas, Arijit
Steiner, Ian M
description A multicore processor may include multiple processing cores that were previously designated as active cores and at least one processing core that was previously designated as a functional spare. The processor may include an interface to receive, during operation of the processor in an end-user environment, a request to change the designation of at least one of the processing cores. The processor may be to store, into a desired cores configuration data structure in response to the request, data representing a bitmask that reflects the requested change, and to execute a reset sequence. During the reset sequence, the processor may activate, dependent on the bitmask, a processing core previously designated as a functional spare, or may deactivate, dependent on the bitmask, a processing core previously designated as an active core. The processor may include a predetermined maximum number of active cores and a predetermined minimum number of functional spares.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10552270B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10552270B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10552270B23</originalsourceid><addsrcrecordid>eNrjZNALriwuSc0tVkjMS1HITS3JyE8pVkjLL1LIzNNNy0zNSVFIzi9KVUhLzMzJL0st4mFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8aHBhgampkZG5gZORsbEqAEA4M4qZA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Systems and methods for in-field core failover</title><source>esp@cenet</source><creator>Riedlinger, Reid J ; DeHaemer, Eric J ; Biswas, Arijit ; Steiner, Ian M</creator><creatorcontrib>Riedlinger, Reid J ; DeHaemer, Eric J ; Biswas, Arijit ; Steiner, Ian M</creatorcontrib><description>A multicore processor may include multiple processing cores that were previously designated as active cores and at least one processing core that was previously designated as a functional spare. The processor may include an interface to receive, during operation of the processor in an end-user environment, a request to change the designation of at least one of the processing cores. The processor may be to store, into a desired cores configuration data structure in response to the request, data representing a bitmask that reflects the requested change, and to execute a reset sequence. During the reset sequence, the processor may activate, dependent on the bitmask, a processing core previously designated as a functional spare, or may deactivate, dependent on the bitmask, a processing core previously designated as an active core. The processor may include a predetermined maximum number of active cores and a predetermined minimum number of functional spares.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200204&amp;DB=EPODOC&amp;CC=US&amp;NR=10552270B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200204&amp;DB=EPODOC&amp;CC=US&amp;NR=10552270B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Riedlinger, Reid J</creatorcontrib><creatorcontrib>DeHaemer, Eric J</creatorcontrib><creatorcontrib>Biswas, Arijit</creatorcontrib><creatorcontrib>Steiner, Ian M</creatorcontrib><title>Systems and methods for in-field core failover</title><description>A multicore processor may include multiple processing cores that were previously designated as active cores and at least one processing core that was previously designated as a functional spare. The processor may include an interface to receive, during operation of the processor in an end-user environment, a request to change the designation of at least one of the processing cores. The processor may be to store, into a desired cores configuration data structure in response to the request, data representing a bitmask that reflects the requested change, and to execute a reset sequence. During the reset sequence, the processor may activate, dependent on the bitmask, a processing core previously designated as a functional spare, or may deactivate, dependent on the bitmask, a processing core previously designated as an active core. The processor may include a predetermined maximum number of active cores and a predetermined minimum number of functional spares.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNALriwuSc0tVkjMS1HITS3JyE8pVkjLL1LIzNNNy0zNSVFIzi9KVUhLzMzJL0st4mFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8aHBhgampkZG5gZORsbEqAEA4M4qZA</recordid><startdate>20200204</startdate><enddate>20200204</enddate><creator>Riedlinger, Reid J</creator><creator>DeHaemer, Eric J</creator><creator>Biswas, Arijit</creator><creator>Steiner, Ian M</creator><scope>EVB</scope></search><sort><creationdate>20200204</creationdate><title>Systems and methods for in-field core failover</title><author>Riedlinger, Reid J ; DeHaemer, Eric J ; Biswas, Arijit ; Steiner, Ian M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10552270B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2020</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Riedlinger, Reid J</creatorcontrib><creatorcontrib>DeHaemer, Eric J</creatorcontrib><creatorcontrib>Biswas, Arijit</creatorcontrib><creatorcontrib>Steiner, Ian M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Riedlinger, Reid J</au><au>DeHaemer, Eric J</au><au>Biswas, Arijit</au><au>Steiner, Ian M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Systems and methods for in-field core failover</title><date>2020-02-04</date><risdate>2020</risdate><abstract>A multicore processor may include multiple processing cores that were previously designated as active cores and at least one processing core that was previously designated as a functional spare. The processor may include an interface to receive, during operation of the processor in an end-user environment, a request to change the designation of at least one of the processing cores. The processor may be to store, into a desired cores configuration data structure in response to the request, data representing a bitmask that reflects the requested change, and to execute a reset sequence. During the reset sequence, the processor may activate, dependent on the bitmask, a processing core previously designated as a functional spare, or may deactivate, dependent on the bitmask, a processing core previously designated as an active core. The processor may include a predetermined maximum number of active cores and a predetermined minimum number of functional spares.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US10552270B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Systems and methods for in-field core failover
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T21%3A47%3A51IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Riedlinger,%20Reid%20J&rft.date=2020-02-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10552270B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true