Multi-processor core device with MBIST

In an embedded device with a plurality of processor cores, each core has a static random access memory (SRAM), a memory built-in self-test (MBIST) controller associated with the SRAM, an MBIST access port coupled with the MBIST controller, an MBIST finite state machine (FSM) coupled with the MBIST a...

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Bibliographische Detailangaben
Hauptverfasser: Yuenyongsgool, Yong, Balu, Manivannan, Bowling, Stephen, Wojewoda, Igor, Phoenix, Timothy, Fernandes, Dereck, Bradley, Steve
Format: Patent
Sprache:eng
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