Semiconductor device and method of manufacturing the same

A semiconductor device includes a first active pattern and a second active pattern on a substrate, a first gate electrode and a second gate electrode respectively across the first active pattern and the second active pattern, a first insulation pattern between and separating the first and second gat...

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Hauptverfasser: Hong, Seungsoo, Min, Kyungseok, Oh, Youngmook, Gwak, Minchan, Lim, Bora, Jung, HyunHo, Seong, GeumJung, Lee, JeongYun, Woo, Jae-Hoon
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creator Hong, Seungsoo
Min, Kyungseok
Oh, Youngmook
Gwak, Minchan
Lim, Bora
Jung, HyunHo
Seong, GeumJung
Lee, JeongYun
Woo, Jae-Hoon
description A semiconductor device includes a first active pattern and a second active pattern on a substrate, a first gate electrode and a second gate electrode respectively across the first active pattern and the second active pattern, a first insulation pattern between and separating the first and second gate electrodes, a gate spacer on a sidewall of the first gate electrode, on a sidewall of the second gate electrode, and on a sidewall of the first insulation pattern, and a second insulation pattern between the gate spacer and the sidewall of the first insulation pattern, wherein the first gate electrode, the first insulation pattern, and the second gate electrode are arranged along a first direction, and wherein the gate spacer extends in the first direction.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10332898B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10332898B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10332898B23</originalsourceid><addsrcrecordid>eNrjZLAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU8hNzCtNS0wuKS3KzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGBsbGRhaWFk5GxsSoAQBQ8C7r</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and method of manufacturing the same</title><source>esp@cenet</source><creator>Hong, Seungsoo ; Min, Kyungseok ; Oh, Youngmook ; Gwak, Minchan ; Lim, Bora ; Jung, HyunHo ; Seong, GeumJung ; Lee, JeongYun ; Woo, Jae-Hoon</creator><creatorcontrib>Hong, Seungsoo ; Min, Kyungseok ; Oh, Youngmook ; Gwak, Minchan ; Lim, Bora ; Jung, HyunHo ; Seong, GeumJung ; Lee, JeongYun ; Woo, Jae-Hoon</creatorcontrib><description>A semiconductor device includes a first active pattern and a second active pattern on a substrate, a first gate electrode and a second gate electrode respectively across the first active pattern and the second active pattern, a first insulation pattern between and separating the first and second gate electrodes, a gate spacer on a sidewall of the first gate electrode, on a sidewall of the second gate electrode, and on a sidewall of the first insulation pattern, and a second insulation pattern between the gate spacer and the sidewall of the first insulation pattern, wherein the first gate electrode, the first insulation pattern, and the second gate electrode are arranged along a first direction, and wherein the gate spacer extends in the first direction.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190625&amp;DB=EPODOC&amp;CC=US&amp;NR=10332898B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190625&amp;DB=EPODOC&amp;CC=US&amp;NR=10332898B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Hong, Seungsoo</creatorcontrib><creatorcontrib>Min, Kyungseok</creatorcontrib><creatorcontrib>Oh, Youngmook</creatorcontrib><creatorcontrib>Gwak, Minchan</creatorcontrib><creatorcontrib>Lim, Bora</creatorcontrib><creatorcontrib>Jung, HyunHo</creatorcontrib><creatorcontrib>Seong, GeumJung</creatorcontrib><creatorcontrib>Lee, JeongYun</creatorcontrib><creatorcontrib>Woo, Jae-Hoon</creatorcontrib><title>Semiconductor device and method of manufacturing the same</title><description>A semiconductor device includes a first active pattern and a second active pattern on a substrate, a first gate electrode and a second gate electrode respectively across the first active pattern and the second active pattern, a first insulation pattern between and separating the first and second gate electrodes, a gate spacer on a sidewall of the first gate electrode, on a sidewall of the second gate electrode, and on a sidewall of the first insulation pattern, and a second insulation pattern between the gate spacer and the sidewall of the first insulation pattern, wherein the first gate electrode, the first insulation pattern, and the second gate electrode are arranged along a first direction, and wherein the gate spacer extends in the first direction.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU8hNzCtNS0wuKS3KzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGBsbGRhaWFk5GxsSoAQBQ8C7r</recordid><startdate>20190625</startdate><enddate>20190625</enddate><creator>Hong, Seungsoo</creator><creator>Min, Kyungseok</creator><creator>Oh, Youngmook</creator><creator>Gwak, Minchan</creator><creator>Lim, Bora</creator><creator>Jung, HyunHo</creator><creator>Seong, GeumJung</creator><creator>Lee, JeongYun</creator><creator>Woo, Jae-Hoon</creator><scope>EVB</scope></search><sort><creationdate>20190625</creationdate><title>Semiconductor device and method of manufacturing the same</title><author>Hong, Seungsoo ; Min, Kyungseok ; Oh, Youngmook ; Gwak, Minchan ; Lim, Bora ; Jung, HyunHo ; Seong, GeumJung ; Lee, JeongYun ; Woo, Jae-Hoon</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10332898B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Hong, Seungsoo</creatorcontrib><creatorcontrib>Min, Kyungseok</creatorcontrib><creatorcontrib>Oh, Youngmook</creatorcontrib><creatorcontrib>Gwak, Minchan</creatorcontrib><creatorcontrib>Lim, Bora</creatorcontrib><creatorcontrib>Jung, HyunHo</creatorcontrib><creatorcontrib>Seong, GeumJung</creatorcontrib><creatorcontrib>Lee, JeongYun</creatorcontrib><creatorcontrib>Woo, Jae-Hoon</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hong, Seungsoo</au><au>Min, Kyungseok</au><au>Oh, Youngmook</au><au>Gwak, Minchan</au><au>Lim, Bora</au><au>Jung, HyunHo</au><au>Seong, GeumJung</au><au>Lee, JeongYun</au><au>Woo, Jae-Hoon</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and method of manufacturing the same</title><date>2019-06-25</date><risdate>2019</risdate><abstract>A semiconductor device includes a first active pattern and a second active pattern on a substrate, a first gate electrode and a second gate electrode respectively across the first active pattern and the second active pattern, a first insulation pattern between and separating the first and second gate electrodes, a gate spacer on a sidewall of the first gate electrode, on a sidewall of the second gate electrode, and on a sidewall of the first insulation pattern, and a second insulation pattern between the gate spacer and the sidewall of the first insulation pattern, wherein the first gate electrode, the first insulation pattern, and the second gate electrode are arranged along a first direction, and wherein the gate spacer extends in the first direction.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor device and method of manufacturing the same
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-11T06%3A05%3A38IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Hong,%20Seungsoo&rft.date=2019-06-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10332898B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true