Cryptographic cache lines for a trusted execution environment

Memory security technologies are described. An example processing system includes a processor core and a memory controller coupled to the processor core and a memory. The processor core can receive a content read instruction from an application. The processor core can identify a cache line (CL) from...

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Bibliographische Detailangaben

Hauptverfasser:	Komijani, Saeedeh, Lehman, Tamara S, Rozas, Carlos V, Mckeen, Francis X, Chhabra, Siddhartha
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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