FinFET cut isolation opening revision to compensate for overlay inaccuracy

A method to address overlay accuracy compensation using finFET cut isolation revisions is disclosed. For an integrated circuit (IC) layout including at least a portion of an active region including a plurality of gates extending over a plurality of fins, prior to optical proximity correction of the...

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Bibliographische Detailangaben
Hauptverfasser:	Ding, Erfeng, Shen, Hongliang, Ning, Guoxiang
Format:	Patent
Sprache:	eng
Schlagworte:	APPARATUS SPECIALLY ADAPTED THEREFOR BASIC ELECTRIC ELEMENTS CALCULATING CINEMATOGRAPHY COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY ELECTROGRAPHY HOLOGRAPHY MATERIALS THEREFOR MEASURING MEASURING ANGLES MEASURING AREAS MEASURING IRREGULARITIES OF SURFACES OR CONTOURS MEASURING LENGTH, THICKNESS OR SIMILAR LINEARDIMENSIONS ORIGINALS THEREFOR PHOTOGRAPHY PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES PHYSICS SEMICONDUCTOR DEVICES TESTING
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