Wiring pattern manufacturing method and transistor manufacturing method

A wiring pattern manufacturing method includes: applying a liquid body including a first formation material on a substrate to form a base film; applying a liquid body including a second formation material on at least part of a surface of the base film to form a protection layer of the base film; for...

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Hauptverfasser: Sugizaki, Takashi, Kawakami, Yusuke, Koizumi, Shohei
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creator Sugizaki, Takashi
Kawakami, Yusuke
Koizumi, Shohei
description A wiring pattern manufacturing method includes: applying a liquid body including a first formation material on a substrate to form a base film; applying a liquid body including a second formation material on at least part of a surface of the base film to form a protection layer of the base film; forming a resist layer on a surface of the protection layer to expose the resist layer with desired patterning light; causing the exposed resist layer to come into contact with a developer to remove the resist layer and the protection layer until the base film is uncovered corresponding to the patterning light; and after depositing a catalyst on a surface of the uncovered base film, causing an electroless plating solution to come into contact with the surface of the base film to perform electroless plating.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US10297773B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US10297773B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US10297773B23</originalsourceid><addsrcrecordid>eNrjZHAPzyzKzEtXKEgsKUktylPITcwrTUtMLikFi-amlmTkpygk5qUolBQl5hVnFpfkF2FVw8PAmpaYU5zKC6W5GRTdXEOcPXRTC_LjU4sLEpNT81JL4kODDQ2MLM3NzY2djIyJUQMA6wA1Lg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Wiring pattern manufacturing method and transistor manufacturing method</title><source>esp@cenet</source><creator>Sugizaki, Takashi ; Kawakami, Yusuke ; Koizumi, Shohei</creator><creatorcontrib>Sugizaki, Takashi ; Kawakami, Yusuke ; Koizumi, Shohei</creatorcontrib><description>A wiring pattern manufacturing method includes: applying a liquid body including a first formation material on a substrate to form a base film; applying a liquid body including a second formation material on at least part of a surface of the base film to form a protection layer of the base film; forming a resist layer on a surface of the protection layer to expose the resist layer with desired patterning light; causing the exposed resist layer to come into contact with a developer to remove the resist layer and the protection layer until the base film is uncovered corresponding to the patterning light; and after depositing a catalyst on a surface of the uncovered base film, causing an electroless plating solution to come into contact with the surface of the base film to perform electroless plating.</description><language>eng</language><subject>APPARATUS SPECIALLY ADAPTED THEREFOR ; BASIC ELECTRIC ELEMENTS ; CHEMICAL SURFACE TREATMENT ; CHEMISTRY ; CINEMATOGRAPHY ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING MATERIAL WITH METALLIC MATERIAL ; COATING METALLIC MATERIAL ; DIFFUSION TREATMENT OF METALLIC MATERIAL ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; ELECTROGRAPHY ; HOLOGRAPHY ; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL ; MATERIALS THEREFOR ; METALLURGY ; ORIGINALS THEREFOR ; PHOTOGRAPHY ; PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES ; PHYSICS ; SEMICONDUCTOR DEVICES ; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190521&amp;DB=EPODOC&amp;CC=US&amp;NR=10297773B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20190521&amp;DB=EPODOC&amp;CC=US&amp;NR=10297773B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Sugizaki, Takashi</creatorcontrib><creatorcontrib>Kawakami, Yusuke</creatorcontrib><creatorcontrib>Koizumi, Shohei</creatorcontrib><title>Wiring pattern manufacturing method and transistor manufacturing method</title><description>A wiring pattern manufacturing method includes: applying a liquid body including a first formation material on a substrate to form a base film; applying a liquid body including a second formation material on at least part of a surface of the base film to form a protection layer of the base film; forming a resist layer on a surface of the protection layer to expose the resist layer with desired patterning light; causing the exposed resist layer to come into contact with a developer to remove the resist layer and the protection layer until the base film is uncovered corresponding to the patterning light; and after depositing a catalyst on a surface of the uncovered base film, causing an electroless plating solution to come into contact with the surface of the base film to perform electroless plating.</description><subject>APPARATUS SPECIALLY ADAPTED THEREFOR</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CHEMICAL SURFACE TREATMENT</subject><subject>CHEMISTRY</subject><subject>CINEMATOGRAPHY</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING MATERIAL WITH METALLIC MATERIAL</subject><subject>COATING METALLIC MATERIAL</subject><subject>DIFFUSION TREATMENT OF METALLIC MATERIAL</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>ELECTROGRAPHY</subject><subject>HOLOGRAPHY</subject><subject>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</subject><subject>MATERIALS THEREFOR</subject><subject>METALLURGY</subject><subject>ORIGINALS THEREFOR</subject><subject>PHOTOGRAPHY</subject><subject>PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAPzyzKzEtXKEgsKUktylPITcwrTUtMLikFi-amlmTkpygk5qUolBQl5hVnFpfkF2FVw8PAmpaYU5zKC6W5GRTdXEOcPXRTC_LjU4sLEpNT81JL4kODDQ2MLM3NzY2djIyJUQMA6wA1Lg</recordid><startdate>20190521</startdate><enddate>20190521</enddate><creator>Sugizaki, Takashi</creator><creator>Kawakami, Yusuke</creator><creator>Koizumi, Shohei</creator><scope>EVB</scope></search><sort><creationdate>20190521</creationdate><title>Wiring pattern manufacturing method and transistor manufacturing method</title><author>Sugizaki, Takashi ; Kawakami, Yusuke ; Koizumi, Shohei</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US10297773B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2019</creationdate><topic>APPARATUS SPECIALLY ADAPTED THEREFOR</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CHEMICAL SURFACE TREATMENT</topic><topic>CHEMISTRY</topic><topic>CINEMATOGRAPHY</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING MATERIAL WITH METALLIC MATERIAL</topic><topic>COATING METALLIC MATERIAL</topic><topic>DIFFUSION TREATMENT OF METALLIC MATERIAL</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>ELECTROGRAPHY</topic><topic>HOLOGRAPHY</topic><topic>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</topic><topic>MATERIALS THEREFOR</topic><topic>METALLURGY</topic><topic>ORIGINALS THEREFOR</topic><topic>PHOTOGRAPHY</topic><topic>PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</topic><toplevel>online_resources</toplevel><creatorcontrib>Sugizaki, Takashi</creatorcontrib><creatorcontrib>Kawakami, Yusuke</creatorcontrib><creatorcontrib>Koizumi, Shohei</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sugizaki, Takashi</au><au>Kawakami, Yusuke</au><au>Koizumi, Shohei</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Wiring pattern manufacturing method and transistor manufacturing method</title><date>2019-05-21</date><risdate>2019</risdate><abstract>A wiring pattern manufacturing method includes: applying a liquid body including a first formation material on a substrate to form a base film; applying a liquid body including a second formation material on at least part of a surface of the base film to form a protection layer of the base film; forming a resist layer on a surface of the protection layer to expose the resist layer with desired patterning light; causing the exposed resist layer to come into contact with a developer to remove the resist layer and the protection layer until the base film is uncovered corresponding to the patterning light; and after depositing a catalyst on a surface of the uncovered base film, causing an electroless plating solution to come into contact with the surface of the base film to perform electroless plating.</abstract><oa>free_for_read</oa></addata></record>
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source esp@cenet
subjects APPARATUS SPECIALLY ADAPTED THEREFOR
BASIC ELECTRIC ELEMENTS
CHEMICAL SURFACE TREATMENT
CHEMISTRY
CINEMATOGRAPHY
COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
COATING MATERIAL WITH METALLIC MATERIAL
COATING METALLIC MATERIAL
DIFFUSION TREATMENT OF METALLIC MATERIAL
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
ELECTROGRAPHY
HOLOGRAPHY
INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL
MATERIALS THEREFOR
METALLURGY
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
SEMICONDUCTOR DEVICES
SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
title Wiring pattern manufacturing method and transistor manufacturing method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T13%3A47%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Sugizaki,%20Takashi&rft.date=2019-05-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS10297773B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true