Multi-via redistribution layer for integrated circuits having solder balls

A wafer-level chip-scale package (WLCSP) includes an integrated circuit (IC) chip, and die bonding pads with a redistribution layer (RDL) having multiple via structures located directly below the footprint of a solder ball placed on the bonding pad. The via structures electrically connect the solder...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Gan, Richard Te, Ho, Chung Hsiung, Hsiao, Wayne, Spehar, James Raymond
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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